完整後設資料紀錄
DC 欄位語言
dc.contributor.author邱健忠en_US
dc.contributor.authorChien-Chung Chioen_US
dc.contributor.author吳文榕en_US
dc.contributor.authorWen-Rong Wuen_US
dc.date.accessioned2014-12-12T02:25:45Z-
dc.date.available2014-12-12T02:25:45Z-
dc.date.issued2000en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#NT890435043en_US
dc.identifier.urihttp://hdl.handle.net/11536/67321-
dc.description.abstract近幾年來,直接序列分碼多工(DS-CDMA)的技術已被提為下一代數位蜂巢系統的主要選擇之一。但此系統的容量(capacity)受限於干擾量的多寡。而這個問題能經由多使用者偵測(multiuser detection)而被緩和。在本篇論文中,我們提出ㄧ全數位多使用者之分碼多工接收機。我們將一兩級的部份平行干擾消除(PIC)演算法運用於多使用者偵測及碼追蹤(code tracking)上。且經模擬證實本架構對於偵測及碼追蹤的效能均有相當的改善。最後,此接收機藉由一VHDL的定點架構(fix-point architecture)而實現出來。zh_TW
dc.description.abstractIn recent years, a class of DS-CDMA schemes has been proposed as a major candidate for the next generation digital cellular system. It is known that the capacity of a CDMA system is interference limited. This problem can be alleviated by the so called multiuser detection (MUD). In this thesis, we propose an all digital CDMA receiver for MUD. We use a two-stage partial parallel interference cancellation (PIC) algorithm for MUD as well as for code tracking. It is shown that the detection and code tracking performance can be greatly enhanced using the proposed structure. Finally, the receiver is implemented using the VHDL with a fixed-point architecture.en_US
dc.language.isozh_TWen_US
dc.subject多使用者之分碼多工接收機zh_TW
dc.subjectmultiuser CDMA receiveren_US
dc.title全數位化多使用者之分碼多工接收機及其ASIC設計zh_TW
dc.titleAn all digital multiuser CDMA receiver and its ASIC designen_US
dc.typeThesisen_US
dc.contributor.department電信工程研究所zh_TW
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