軟體無線電之研究:寬頻分碼多重進接空-時犁耙接收器之DSP實現

Abstract

軟體無線電架構的發展，近幾年來已成為一個極受矚目的研究領域。在本論文中，吾人首先介紹軟體無線電(software radio)平台之概念,並整合寬頻分碼多重進接(W-CDMA)技術，發展出結合智慧型陣列天線訊號處理之空-時犁耙接收器(space-time RAKE receiver)。由模擬與實作結果顯示，在多重進接干擾(MAI)的環境下,此架構能有效降低誤碼率(BER)，提高系統效能。系統架構採用參數載入式設計，使其具備軟體無線電要求之可程式化與原件模組化特性，並可透過修改參數，輕易變更系統設定，以符合在不同環境下之通訊規格。吾人根據TMS320C6201 DSP數位信號處理器應用模板來模擬及實現所提之架構，並配合其硬體特性，如平行運算處理單元,環狀定址模式與高速化多功能串列埠等，發展出一具備可程式與相容於第三代行動通訊系統之接收器基頻處理模組。

Recently, the development of software define radio has been an interesting research area in wireless communication signal processing. In this thesis, we first introduce the concept of software define radio. In the following, we propose a smart array antenna based space-time RAKE receiver for wideband CDMA (W-CDMA). It can be shown form simulation and implementation results that the proposed architecture can effectively reduce the bit-error-probability (BER) in the presence of multiple access interference (MAI). For the purpose of programmability and modularity, the proposed system architecture adopts the parameter-download-type scheme. By modifying the core parameter, we can reconfigure the proposed system easily to meet the different specifications. To realize the system, we exploit some of the hardware characteristics offered by TI TMS320C6201 DSP processor, such as parallel ALUs, circular addressing mode, McBSP device, and so on, to develop a programmable receiving backend compatible with 3GPP.