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dc.contributor.author劉睿賢en_US
dc.contributor.authorJuei-Sien Liuen_US
dc.contributor.author洪景華en_US
dc.contributor.authorChinghua Hungen_US
dc.date.accessioned2014-12-12T02:26:04Z-
dc.date.available2014-12-12T02:26:04Z-
dc.date.issued2000en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#NT890489015en_US
dc.identifier.urihttp://hdl.handle.net/11536/67514-
dc.description.abstract隨著電子產品朝向輕、薄、微小化發展,覆晶構裝也成為電子封裝的主流產品之一。覆晶構裝的主要失效原因是作為接點的錫鉛共熔合金(63Sn-37Pb;或稱錫球)之疲勞破裂,這是導因於構裝體不同材料間熱膨脹係數的差異所造成之熱應變。本論文的目的在探討覆晶構裝在受到熱循環負載下的可靠度問題;使用有限元素軟體ABAQUS模擬錫球在溫度負荷下的非線性行為,並由Coffin-Manson關係式預測其疲勞壽命;比較本研究的數值結果與文獻中之實驗數據,驗證了模擬的準確性。最後利用田口理論對構裝體的幾何因子與材料因子進行參數設計,以期能用最有效率的方式設計出具有較高錫球壽命的參數組合。zh_TW
dc.description.abstractFlip chip package has become a very attractive solution with increasing demand on low cost, miniaturization, and weight reduction of electronic products. The major reliability issue of flip chip package is solder joint crack due to thermal expansion mismatch between joined materials. The purpose of this research is to study the solder joint reliability of flip chip subjected to temperature cycling. FEM code ABAQUS was applied to investigate the nonlinear behavior of eutectic solder joint (63Sn-37Pb) under temperature load. Fatigue life of solder joint was predicted by Coffin-Manson relationship. Good agreements were obtained between numerical results in this thesis and experimental data in other researches. To complete the study, Taguchi method was performed on the choices of underfill materials and size of the package. The final goal is to establish the methodology in obtaining the optimized combination of these parameters to improve the reliability of flip chip.en_US
dc.language.isozh_TWen_US
dc.subject覆晶構裝zh_TW
dc.subject潛變zh_TW
dc.subject疲勞失效zh_TW
dc.subject有限元素法zh_TW
dc.subject田口法zh_TW
dc.subjectFlip Chip Packageen_US
dc.subjectCreepen_US
dc.subjectFatigue Failureen_US
dc.subjectFinite Element Methoden_US
dc.subjectTaguchi Methoden_US
dc.title覆晶構裝之錫球疲勞壽命分析zh_TW
dc.titleFatigue Life Analysis for Solder Joints of Flip Chip Packageen_US
dc.typeThesisen_US
dc.contributor.department機械工程學系zh_TW
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