完整後設資料紀錄
DC 欄位語言
dc.contributor.author張勝凱en_US
dc.contributor.authorSheng-Kai Changen_US
dc.contributor.author胡竹生en_US
dc.contributor.authorJwu-Sheng Huen_US
dc.date.accessioned2014-12-12T02:26:28Z-
dc.date.available2014-12-12T02:26:28Z-
dc.date.issued2000en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#NT890591026en_US
dc.identifier.urihttp://hdl.handle.net/11536/67793-
dc.description.abstract本論文主要針對ITU-T制訂之G.723.1語音編解碼於TI 16位元定點DSP C5402晶片上的即時軟體實現。本論文分為兩部分,第一部份概略介紹ITU-T G.723.1語音編碼及解碼理論。第二部分則介紹定點的運算,並採用組語的方式加上一些最佳化的方法來降低DSP整體的運算量,使得此編解碼能夠即時實現於所使用之DSP晶片中。經過最佳化之後,程式與資料記憶體則只需要26.6k字元(words),對5.3kbps及6.3kbps兩種位元率,於DSP上的運算複雜度分別降低至37以及39 MIPS,這僅只佔了100 MIPS DSP的不到40%。最後,為了證實本論文實際達到即時編解碼的改進,本論文也實作了一個即時語音編解碼的展示。zh_TW
dc.description.abstractThis thesis presents a full-duplex, real-time implementation of ITU-T G.723.1 speech coder on a 16-bit fixed-point TI’s DSP chip, TMS320C5402. This thesis is divided into two parts. In the first part of the thesis, a brief introduction of G.723.1 speech encoder and decoder is presented. In the second part, the fixed-point operations and optimization methods are proposed in order to reduce the total cycle times consumed in real-time implementation. After the optimization, the total code size is 26.6k words and the computation complexities are 37 and 39 MIPS in the dual bit rates of 5.3k and 6.3kbps respectively, which are less than 40% of 100 MIPS DSP. In addition, a real-time demo using DSP/BIOS is also presented in this thesis.en_US
dc.language.isoen_USen_US
dc.subjectG.723.1zh_TW
dc.subjectDSP晶片zh_TW
dc.subject即時軟體實現zh_TW
dc.subject語音編解碼zh_TW
dc.subjectG.723.1en_US
dc.subjectReal-Timeen_US
dc.subjectspeech codecen_US
dc.subjectdspen_US
dc.subject5402en_US
dc.titleG.723.1語音編解碼於DSP晶片之即時軟體實現zh_TW
dc.titleReal-Time Implementation of G.723.1 Speech Codec on a 16-bit DSP Processoren_US
dc.typeThesisen_US
dc.contributor.department電控工程研究所zh_TW
顯示於類別:畢業論文