參數化LZ77壓縮/解壓縮晶片設計

Abstract

LZ77在資料壓縮及通訊傳輸的領域方面,是一個非常重要的演算法。故在本篇論文中,提出一個參數化.低成本且高速度的LZ77壓縮/解壓縮晶片。因為LZ77演算法須處理大量比對的工作，目前提出的LZ77晶片中,有些用心跳陣列來實現,其缺點是成本高且比對的延遲時間長。因此我們提出一個以特殊記憶體CAM為基礎的晶片,來節省成本及加速比對時間。另外,因壓縮比和字典的大小及最大比對長度有很強烈的關係。因此,為了取代用固定參數來壓縮/解壓縮資料,我們提出一個可針對不同檔案來規劃參數,以達到使用者要求的壓縮比。最後,本篇論文結合full-custom 和cell–based 的設計流程,利用台積電CMOS 0.35 mm 的製程,實現壓縮/解壓縮晶片。

LZ77 is one of the most important compression algorithms in the field of data compression and telecommunication. To realize the algorithm on a single chip, the thesis proposes a Lampel-Ziv 77(LZ77) codec chip that features low-cost, high-speed, and parameterization. Since the LZ77 compression requires heavy comparison tasks, some of off-the-shelf LZ77 chips employ systolic array to implement the tasks. However, the systolic architectures are costly and require long latency. Hence, we proposes a CAM-based codec chip to reduce the cost and speed up the compression latency. In addition, the compression ratio of LZ77 is strongly depended on the parameters in terms of the size of dictionary and the length of comparison window. So, instead of applying a set of fixed parameters to the codec, we design a configurable chip that allows user to assign parameters for low compression ratio. As a result, the thesis uses a hybrid design flow, combined fully-custom and cell-based design flows, and 0.35 mm TSMC CMOS process to implement the codec.