ARM9微處理機之省電設計

Abstract

可攜式設備的快速成長，為嵌入式系統帶來了許多新的應用與挑戰。省電設計在整個系統規劃上為相當重要的課題。根據研究發現，在執行某段程式過程中，運算單元會執行一段時間後閒置，也就是說運算單元不需一直保持於忙碌狀態，這種狀況提供了省電設計的可能。因此，若能將不需使用的運算單元關閉，則可節省不必要之能量消耗。 在本論文中，我們探討如何降低各運算單元的活動，來減少系統的耗能。我們提出了三個方法，分別為：當指令執行時適當的關閉不需使用的運算單元、對於Dummy運算的特殊處理、和減少False-condition指令所造成運算單元不必要的活動。 架構上的設計重點包含指令解碼器的加強、運算元選擇單元的建立以及資料路徑的修改等三部分。藉由事先分析各指令的行為，指令解碼器可決定出指令在執行時不需使用之運算單元。透過運算元選擇單元來保持上次運算的值；當運算單元不需運作時，可將上一次運算的值送入運算單元以減少運算單元狀態的轉換所產生的耗能。另外，我們對算術運算邏輯單元和移位器的資料路徑做了小幅度的修改；在發生某些特別運算時，能將運算元適當的繞徑來減少運算單元內部的耗能。 我們以ARM9TDMI為實驗對象並針對上述機制進行模擬。模擬結果顯示，相較於原本ARM9TDMI上的各運算單元的活動率，在算術邏輯單元上可節省30%，移位器可節省60%，而乘法器則高達99%以上。

The market of portable devices is growing rapidly, and many applications and challenges appear in the design of an embedded system. Low power design becomes an important issue for embedded system design. Observation reveals that function units are sometimes idle for a period of time after serving a burst of computation requests. This provides us an opportunity to design low power architecture. If we can reduce the number of signal switching activities, the unnecessary power consumption will be saved. In this thesis, we propose three methods to reduce switching activities of function unit. The proposed methods are freezing unused function unit for instruction execution, bypassing dummy operation, and freezing all function units for false-condition instruction. The architecture design includes enhancement of the instruction decoder, Operand-Selection unit (OSU) design, and data-path modification. By profiling instruction behaviors in advance, the instruction decoder can determine the unused function units for an instruction, and then freeze these units in the following cycle. The OSU is used to keep a previous operand of a function unit and restore it to the function unit when the unit will not work in the next cycle. In addition, we modify the data-path of ALU and shifter to reduce the power consumption by bypassing some operands when encountering special operations. We simulate our proposed methods on ARM9TDMI and compare the switching activity for each function unit. Simulation results show that the reduction of switching activity for ALU using our mechanism is 30% of the original, and that for shifter is 60%, and that for multiplier is 99%.