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dc.contributor.author李天成en_US
dc.contributor.authorTien-Cheng Leeen_US
dc.contributor.author李建平en_US
dc.contributor.authorChien-Ping Leeen_US
dc.date.accessioned2014-12-12T02:28:05Z-
dc.date.available2014-12-12T02:28:05Z-
dc.date.issued2001en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#NT900428042en_US
dc.identifier.urihttp://hdl.handle.net/11536/68737-
dc.description.abstract本論文最主要的目的為利用三五族半導體之量子井結構,製作出新式熱激發型致冷晶片,藉以改善傳統熱電型致冷器之降溫特性。 整篇論文之架構可分為三大部份,首先,第一部份將對熱電型致冷器之運作原理做介紹,並引進關於評估致冷器特性優劣與否的各式參數。接下來我們便針對傳統熱電致冷器的缺點,提出了另一種新型致冷的概念,並透過理論的分析與模型的建立,將這種技術應用在異質接面半導體之量子井結構上。最後,我們將以理論為基礎,經由設計以製作出成品,並透過量測所得之結果和熱電致冷器相互比較,以證明當初之設計概念確實可行。 透過合理的設計,我們成功製作出降溫特性更好的熱激發型致冷元件。在室溫下操作即可達到最大約6.5℃的致冷功效,而遠比單純使用半導體基板最高所能達到的4℃溫降要來得好。同時,我們也針對了元件面積大小、操作之背景溫度、基板厚度及量子井周期等可能會影響元件致冷效能之各項因子進行討論,透過實驗的分析與比較,希望能藉此而設計出冷卻能力更強的微致冷晶片,並廣泛應用在各式奈米元件之冷卻系統上,相信對於元件操作之穩定性及可靠性等方面必能有所提升。zh_TW
dc.description.abstractThe purpose to this thesis is mainly to develop a sort of new cooling chips, fabricated with the quantum well structures of III-V compound semiconductor and called “Thermionic coolers”. There is a better cooling performance for thermionic coolers than that for conventional thermoelectric coolers. This thesis is divided into three parts. Firstly we introduce the operation principle of a thermoelectric cooler and some characteristic parameters about a cooler. Then we publish a new cooling idea to improve some disadvantages of the conventional TE cooler , construct a design model based on the related theorems, and apply the heterostructure quantum well semiconductor in the new field. Through the appreciate theoretical design, finally we can fabricate a cooler object and make an experiment in its cooling performance by applying a DC current bias. By comparing the cooling ability for thermionic coolers with that for thermoelectric ones, the initial design conception is verified. Through our detailed design flow, we had successfully fabricated a new cooler chip which owns better cooling performances. Its maximum cooling temperature might reach to 6.5℃under the room temperature operation circumstances, which is much better than the maximum 4℃ temperature drop for a TE cooler made by n+ GaAs substrate. Besides, we also discussed the influences of some possible factors on the device cooling ability, such as etched mesa region, operation background temperature, substrate thickness and quantum well period number, and so on. From our discussion results, we hope that we could unceasingly improve its cooling performance, stability and reliability, finally we might widely apply the micro-coolers to nano device fields.en_US
dc.language.isozh_TWen_US
dc.subject異質接面zh_TW
dc.subject熱激發zh_TW
dc.subject致冷晶片zh_TW
dc.subjectheterostructureen_US
dc.subjectthermionicen_US
dc.subjectcooling chipen_US
dc.title異質接面半導體致冷器上之應用zh_TW
dc.titleThe Application of Semiconductor Heterostructures in Cooling Chipsen_US
dc.typeThesisen_US
dc.contributor.department電子研究所zh_TW
Appears in Collections:Thesis