寬頻分碼多工系統中結合碼擷取及頻率估測演算法研究及其FPGA實現

Abstract

在CDMA系統中傳統碼擷取架構是使用數位匹配濾波器(DMF)達成初始碼同步。然而如果傳送端和接收端的震盪器產生頻率偏移，則此數位匹配濾波器輸出效能將會衰減。此論文中，我們提出碼擷取及頻率估測結合的架構來解決W-CDMA系統中的碼擷取問題。第一步我們將DMF切分成數塊子匹配濾波器，並且計算出這些子匹配濾波器輸出的相關函數，使用此相關函數，即使在高頻率偏移下還是可獲得碼同步，所提出的架構不需使用到乘法器故運算複雜度低。達到碼擷取之後我們再利用相關函數估測頻率偏移。我們也提出一彈性的硬體架構可在碼擷取時間及複雜度方面做取捨。最後採用FPGA設計流程實現所提出的方法。

Conventional code acquisition in a CDMA system uses digital matched filter (DMF) to obtain initial synchronization. However, if the frequency offset between the transmitter and receiver oscillator exists, the DMF performance will degrade. In this thesis, we consider the code acquisition problem in a W-CDMA system. We propose a joint code acquisition and frequency estimation scheme that can effective solve the problem. First, we divide DMF into sub-filters and then compute correlations among the sub-filter outputs. Using the correlations, we are able to acquire the incoming code even in a large frequency offset scenario. The proposed method is multiplication-free and thus the computational complexity is low. After acquisition, we use the correlation functions to estimate the frequency offset. We also propose a flexible hardware architecture that can have a tradeoff between the complexity and the acquisition time. Finally, the proposed method is implemented using a FPGA design flow.