IEEE 802.11a無線區域網路全數位中頻至基頻升降頻轉換器之設計

Abstract

本篇論文將對適用於IEEE802.11a系統中的升降頻轉換器 (Up/Down Converter) 設計做逐一的探討研究。其中所使用的系統之理論，我們採用半頻帶濾波器 (Half-band filter) 之架構及多速率設計其所使用之多相拆解方式。基於多速率系統理論利用內插 (Interpolation) 我們可以一方面將基頻訊號的取樣頻率上升四倍，在另一方面同時在接收端作為ADC後級的降頻濾波器，則利用 (Decimation) 將ADC的輸出訊號之取樣頻率降為四分之一倍。在升降頻的同時，則運用移時 (time shift) 與移頻的原理作基頻訊號與低中頻帶 (Low IF) 之間之轉換。 我們同時希望此一升降頻轉換器能在硬體方面加以實現，因此本篇論文也將硬體架構加以分析。我們藉由一種特別的數碼表示方式 (number representation)及高速率壓縮單元 (high-rate compressor) 來降低硬體的功率消耗與電路複雜度。再利用交錯式的方式濾波器在架構上化簡，達到濾波器資源共享來降低硬體成本。

In this paper, an alternative approach for the design of an IEEE 802.11a standard digital IF up/down converter is presented. The signal up or down conversion are achieved by integrating half-band filter architecture with polyphase decomposition technique used in multi-rate signal processing. According to multi-rate system theory, while on the one hand, the signal sampling frequency can be increased four times by interpolation, on the other hand, the ADC output signal sampling frequency can be decreased four times by decimation. At the same time, we apply the theory of time shift and frequency shift to realize the conversion between baseband and low IF. This paper also addresses efficient implementation of the up/down converter architecture. By means of an unconventional number representation and high-rate compressor, the power consumption and the complexity of circuits can be decreased significantly. Furthermore, applying the interleaving method to simplify the structure, better resource sharing can be achieved and accordingly the implementation cost can be reduced.