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dc.contributor.author吳丕安en_US
dc.contributor.authorWu Pi-Anen_US
dc.contributor.author高曜煌en_US
dc.contributor.authorKao Yao-Huangen_US
dc.date.accessioned2014-12-12T02:28:34Z-
dc.date.available2014-12-12T02:28:34Z-
dc.date.issued2001en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#NT900435103en_US
dc.identifier.urihttp://hdl.handle.net/11536/68982-
dc.description.abstract本論文在使用全積體化金氧半製程,實現規格符合DCS-1800規範的具正交輸出訊號的頻率合成器,可用於低中頻架構的射頻接收機。低中頻接收機的射頻鏡像頻率消除,在於是否能產生精確地I、Q訊號源,即頻率穩定、振幅大小相同、相位差固定九十度。基於以上三點考量,首先設計壓控振盪器,採用線性時變系統分析相位雜訊。正交產生電路方面,使用兩種電路設計,第一種電路採用兩組VCO耦合對 ,第二種電路採用多相位濾波器架構。最後設計頻率合成器,以產生頻率穩定的訊號源。整體電路使用TSMC 0.35微米金氧半製成,透過國家晶片中心(CIC)下線製作。zh_TW
dc.description.abstractThe purpose of this paper is to study fully integrated CMOS frequency synthesizer with quadrature phase outputs, for DCS1800 applications. The synthesizer has the capability of low phase noise and quadrature phase output for low IF receiver. The crucial points are frequency accuracy, equal amplitude and quadrature phase. The phase noise is examined by the linear time varying model . As for quadrature phase, two kinds of circuits are employed. One is the VCO coupled pairs, and the other is poly-phase architecture. The entire circuits are tapeouted by CIC, which using the TSMC 0.35um process to manufactured.en_US
dc.language.isozh_TWen_US
dc.subject頻率合成器zh_TW
dc.subject正交zh_TW
dc.subject壓控振盪器zh_TW
dc.subject預除器zh_TW
dc.subjectFrequency Synthesizersen_US
dc.subjectQuadratureen_US
dc.subjectVCOen_US
dc.subjectPrescaleren_US
dc.title具正交相位輸出的CMOS射頻頻率合成器zh_TW
dc.titleCMOS RF Frequency Synthesizers with Quadrature Phase Outputsen_US
dc.typeThesisen_US
dc.contributor.department電信工程研究所zh_TW
顯示於類別:畢業論文