漸進式影像壓縮編碼器之超大型積體電路設計

Abstract

漸進式影像壓縮編碼器之超大型積體電路設計 學生：簡偉勝 指導教授：董蘭榮 博士 國立交通大學電機與控制工程研究所 摘 要 為了因應頻寬有限的多媒體應用需求，在影像壓縮技術中，漸進式影像傳輸愈來愈受重視。在現有的漸進式影像傳輸的演算法中，大部分都不適合硬體實現，主要原因是由於記憶體需求量的龐大，像目前被公認效能最好的SPIHT演算法就需要大量的記憶體來提供三個列表儲存小波係數的座標。我們針對這個缺點，提出了一個適合於硬體實現的演算法：階層樹旗標設定編碼。我們以三個旗標來代替SPIHT的三個座標列表，大量減少了記憶體的使用量。以處理一張256×256的影像為例，記憶體需求可由原本的250 K bytes減少至18 K bytes。本篇論文以矽智產的型式來實現此演算法，以便搭配其他電路來做成各類多媒體應用系統晶片。最後，本論文實際合成可處理256×256影像的漸進式影像壓縮編碼器同時考量功率節省。合成出來的矽智產面積成本低，邏輯電路部分只需2560個邏輯閘數，電路工作頻率可高達150 MHz。

A VLSI Progressive Coding for Image Compression Student：Wei-Sheng Jian Advisor：Dr. Lan-Rong Dung Department of Electrical and Control Engineering National Chiao Tung University ABSTRACT Progressive image coding is becoming crucial for multimedia signal processing. Much research on image compression has paid much attention on progressive image coding. Nevertheless, the conventional progressive image coding notoriously is costly and memory-consuming. The SPIHT, for instance, is the most popular algorithm for progressive coding and the implementation requires large memory to save three coordinate tables. Thus, the thesis proposes a hardware-efficient algorithm that significantly reduce memory requirement. The algorithm is called Tag Setting In Hierarchical Trees (TSIHT). Instead of using coordinate tables to track the coding tree, the TSIHT uses tags to flag the image coefficients for generating the bitstream. Finally, the thesis implement the algorithm in the form of silicon intelligent property. As a result, the encoder for a 256×256 image requires 18 Kbytes memory that is much less than the memory requirement of SPIHT.