真實亂數產生器之設計

Abstract

在現今的加密系統中，亂數扮演了一個非常重要的地位。在通訊的延伸應用─資訊網路，需要將所要傳輸資料加以保護；如此，為了要讓加密系統不會因為在加上傳輸保護時，有損加密系統的保密性，所以需要一個無法預測的亂數來加密所傳輸的資料。 在這篇論文中，用兩種結構來實現真實亂數產生器，分別是以線性回授移位暫存器及混亂定理來實現。論文中，比較了兩種架構的模擬和量測結果，所得到的結論為以線性回授移位暫存器來實現的真實亂數產生器較為適合在實際應用中。本篇論文新提出的線性回授移位暫存器真實亂數產生器比較是一個提供較穩固而更簡易的實現方式。在行為模式的模擬中，線性回授移位暫存器真實亂數產生器相較於混亂亂數產生器有著較大的比較器輸入電壓位移忍受力。兩種架構都在實現在TSMC 2P5M CMOS製程。 線性回授移位暫存器真實亂數產生器實現面積為 ，工作電壓為2.5伏，工作頻率為1M赫茲。整個電路消耗了 。以標準的統計測試，諸如mono-bit test、poker test、run test、和long run test測試這種架構的表現。線性回授移位暫存器真實亂數產生器通過了上述的測試。額外的，還以頻譜分析來分析輸出的相關性，證明了這種架構的可行性。 而在以混亂定理來實現的亂數產生器，整個電路消耗了 較少於線性回授移位暫存器真實亂數產生器。而電路的面積上佔了 ，也較上一種架構來得小。但這種架構卻沒辨法像線性回授移位暫存器真實亂數產生器一樣工作順利。混亂定理實現的亂數產生器工作在相同環境上和100K赫茲的操作頻率，但卻無法通過前述的統計測試。

Random number plays an important role in modern security system. The expanding uses of communications by means of computer networks have resulted in a greater demand for the protection of transmitted information. It is clear that, in order not to compromise the system security, the random numbers used in such applications must be truly unpredictable. Two architectures, the LFSR-based random number generator and chaotic random number generator, are built to produce truly random numbers. The simulated results and measured data are compared to each other and this comparison concludes that the LFSR-based architecture is more suitable in application. The LFSR-based random number generator, newly introduced in this work is more robust and easy to implement. The behavioral simulation further shows that the offset tolerance of the LFSR-based random number generator can be which is much larger than in the chaotic random number generator. Both of them are fabricate in TSMC 2P5M CMOS process and measured at the same condition. Firstly, the LFSR-based random number generator occupies active area of . The circuit is working at a voltage supply of 2.5V and an operating frequency of 1MHz. And the total power consumed in the circuit is . The standard statistical tests, such as mono-bit test, poker test, run test, and long run test, are applied to measure the performance of LFSR-based random number generator. The LFSR-based architecture passes the statistical tests mentioned above. Additionally, power spectrum analysis is also adopted to check the correlation of output binary sequence and manifests the ability of this new architecture. Secondly, the chaotic random number generator consumes power less than the LFSR-based one. The circuit occupies active area of which is also smaller than the LFSR-based random number generator. However, the chaotic random number generator doesn’t work well as the LFSR-based one. The chaotic random number generator, working in the same condition and having the 100KHz operating frequency, doesn’t fit the standard statistical tests.