MPEG-4 即時視訊編碼之數位信號處理器實現

Abstract

ISO/IEC MPEG 所制定的MPEG-4是一高效率的多媒體資訊編碼標準。在本篇論文中，我們使用數位信號處理器去即時實現MPEG-4視訊編碼。此數位信號處理環境為Innovative Integration公司的Quatro62個人電腦插版，其上裝置是德州儀器公司TMS320C6201，是個擁有強大的數學運算功能的處理器。 在程式執行方面，我們使用一公開的程式 MoMuSys 加以修改以完成MPEG-4視訊編碼與解碼，並改變其內部的架構與程式的寫法使其能夠符合數位信號處理器硬體上的限制。為了能解決此處理器上程式記憶體不足的問題，我們將程式作了些調整。我們移除掉傳輸速率控制、用macro取代較小的程式、迴避多層物件之處理控制、並作了一些簡單的程式的改寫。在整個MoMuSys的系統中，總共減少 77 %的程式記憶體空間，並將整個MoMuSys切割為實質編碼與移動估計放於兩個數位信號處理器處理。另外對於此處理器中的平行計算元，我們亦更改的程式的寫法使其能達到最大的平行度。在速度方面，主要是針對DCT/IDCT與移動估計作加速。在DCT/IDCT部分，我們將浮點數的運算改為整數運算；而在移動估計部分，我們不只做了演算法架構上的更改，也特別針對數位處理器的特性改寫程式，讓其能達到更大的速度，如此更改的結果只使編碼品質有少許的下降。利用兩個處理器可以平行處理的優點，我們最後達到一秒能編碼六張影像的速度。 在本篇論文中，我們先簡單介紹MPEG-4的系統架構與所使用的數位訊號處理器及其運作環境。然後我們針對MPEG-4 simple profile視訊編碼器實作時的改善與加速提供詳細的介紹，並介紹整個MPEG-4編碼系統的設計，其中使用兩個數位信號處理器搭配一台個人電腦。最後，我們提供一些執行速度與率差效能方面的實驗數據，並將所實現的程式與原先的程式作比較，並討論其優缺點。

The MPEG-4 standard defined by ISO/IEC MPEG is a very efficient coding standard for multimedia data. In this thesis, we use digital signal processors to implement MPEG-4 video encoding and to achieve the goal of real-time coding. The digital signal processing environment is Innovative Integration’s Quatro62 personal computer card, which houses Texas Instruments’ TMS320C6201 which is a powerful signal processor with strong arithmetic operation capability. In the thesis, we use the public-domain codec MoMusys to establish an MPEG-4 coding and decoding system and modify the architecture to speed up the processing for digital signal processor. First, we do some adjustment to fit the program memory. We remove the rate control, use macros to replace simple functions, change the method of setting control parameters, side-step layers and objects and do others simple modifications for code size reduction. In the MoMuSys, we reduce 77% program memory size and separate the system into two parts, texture coding and main part with motion estimation. In our work, we try to make use of the parallel functional units of the digital signal processor and increase the parallel instructions as much as we can. To speed up the execution, we primarily accelerate DCT/IDCT and motion estimation. For DCT/IDCT, we replace float-point computations by fixed-point computations. For motion estimation, we not only modify the algorithm but also tune the program for the processor to accelerate the computation with parallelized code. This only results in a little performance loss. Employing two digital signal processors working in parallel, we are also to attain an encoding speed of six frames per second. In the thesis, we introduce the MPEG-4 and the environment of DSP (digital signal processor) implementation first. Then we discuss the optimization of the MPEG-4 simple profile video encoder for DSP, and we describe the overall design of the MPEG-4 encoder system, which uses two DSPs working together with the host PC. Finally, we present experimental results on the speed and the rate-distortion performance of the implementation and compare them with results of the original program.