標題: | 使用數位訊號處理器實現MPEG-4精細可調式視訊之即時編碼 Real-Time Implementation of MPEG-4 Fine-Grain-Scalable Video Encoder on Digital signal Processors |
作者: | 陳彥福 Yen-Fu Chen 林大衛 David W. Lin 電子研究所 |
關鍵字: | MPEG-4;精細可調式;數位訊號處理器;即時編碼;MPEG-4;FGS;digital signal processor;real-time;implementation |
公開日期: | 2002 |
摘要: | 在MPEG-4 修正案中,針對逐漸成長的網路視訊傳輸需求提供了精細可調式視訊編碼。它相對於舊的方法利用新的策略去對一個位元率範圍做視訊品質的最佳化。
我們利用兩顆數位訊號處理器去達成MPEG-4精細可調式視訊編碼之即時編碼。我們利用ITU-T的H.263+編碼器作為在基礎層的MPEG-4主要規格編碼器。加強層的精細可調式編碼器是由MoMuSys系統精細可調式編碼的部分取出。為了要在數位訊號處理器上達到即時編碼,我們替換一些在原始C程式中跑的慢的工作方塊,接著再考慮數位訊號處理器-TMS320C6X的特性來修改之前的程式。最後,我們在數位訊號處理器上加速了MPEG-4精細可調式視訊編碼器達六點五倍。在編碼器對所有的位元層做編碼的情況下我們每秒鐘可以處理12張QCIF大小的圖像。
在本篇論文中,我們首先簡介H.263+和MPEG-4。再來是精細可調式視訊編碼的詳細描述。接著我們介紹數位訊號處理器的運作環境。我們所使用的是由Innovative Integration公司製造的數位訊號處理器板,其上裝置德州儀器公司的數位訊號處理器晶片。然後,我們描述整個系統架構以及利用數位訊號處理器的特點加速程式的方法。最後,我們解說被加速的程式以及實驗結果。 Fine Granularity Scalability (FGS), the technique provided in the Amendment of MPEG-4, is developed to the growing need on delivering video over the Internet. It offers a different strategy to optimize video quality over a bitrate range from the conventional ways. We implement a real-time MPEG-4 FGS encoder by using two digital signal processors (DSPs). The base-layer encoder we used is the ITU-T H.263+ encoder instead of the MPEG-4 main profile encoder. The enhancement-layer encoder is extracted from the FGS part of MoMuSys. In order to achieve real-time encoding on the DSP, we replace a few slow blocks in the original C programs and further refine our codes by taking into account the features of the DSP chips, TMS320C62xx, to produce a more efficient program. Overall, we speed up the MPEG-4 FGS encoder on DSP almost 650%. Our encoder can handle 12 frames per second for QCIF pictures with all bitplanes encoded. In this thesis, we first give a brief introduction to the H.263+ and MPEG-4. Then the detailed description the technology of FGS is given. Secondly, we describe the environment of DSP implementation. The DSP board we use is the Innovative Integration (II)'s Quatro6x DSP board. Thirdly, we describe the overall system architecture and the code acceleration methods using the feature of C62x. Last, we illustrated the accelerated functions and experiment results are given. |
URI: | http://140.113.39.130/cdrfb3/record/nctu/#NT910428146 http://hdl.handle.net/11536/70477 |
顯示於類別: | 畢業論文 |