完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Hung, Jui-Hui | en_US |
dc.contributor.author | Chen, Sau-Gee | en_US |
dc.date.accessioned | 2014-12-08T15:01:59Z | - |
dc.date.available | 2014-12-08T15:01:59Z | - |
dc.date.issued | 2008 | en_US |
dc.identifier.isbn | 978-1-4244-4242-3 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/708 | - |
dc.description.abstract | The bit-error-rate (BER) performance of an LDPC decoding algorithm will be seriously degraded when the algorithm is realized with fixed-point implementation in practical applications, due to the introduced quantization errors and rounding errors. To remedy the problem, this paper proposes an improved min-sum algorithm (MSA), called CMVP algorithm. It achieves better performances than the popular min-sum algorithm (MSA), under the condition of the same fixed-point precision. Besides, the hardware overhead of the new algorithm over conventional MSA is small. On the other hand, under the condition of comparable performances, MSA algorithm needs a higher fixed-point precision and hardware costs than the new CMVP algorithm, according to the simulations and hardware synthesis results. The new algorithm also works well in a wide range of code rates and code lengths. | en_US |
dc.language.iso | en_US | en_US |
dc.title | A Low-Complexity High-Performance Decoding Algorithm for Fixed-Point LDPC Decoders | en_US |
dc.type | Proceedings Paper | en_US |
dc.identifier.journal | ICSPCS: 2ND INTERNATIONAL CONFERENCE ON SIGNAL PROCESSING AND COMMUNICATION SYSTEMS, PROCEEDINGS | en_US |
dc.citation.spage | 462 | en_US |
dc.citation.epage | 466 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000268672600073 | - |
顯示於類別: | 會議論文 |