應用運算放大器架構之CMOS寬頻調整範圍射頻前端電壓控制振盪器電路設計

Abstract

本篇論文旨在介紹以運算放大器為架構之電壓控制振盪器電路設計，使用0.25微米或0.18微米CMOS製程，冀以產生由2.4G赫玆至5G赫玆範圍之振盪頻率，具有易於切換於不同製程及低MOS數目之優點。所提出之電路設計，已使用ADS軟體模擬，並以0.25微米CMOS製程製作晶片，以驗證其相關特性。由模擬結果，操作頻率範圍介於2.4G赫茲與5G赫茲之間，並且可以做小範圍頻率之微調。相位雜訊為-48dBc/Hz至-64dBc/Hz（載波頻率偏移100k赫茲），與-68dBc/Hz至-94dBc/Hz（載波頻率偏移1M赫茲）。所實際量測得之操作頻率範圍介於1.12G赫茲與3.45G赫茲之間，相位雜訊則與模擬結果數值接近。此外，在本篇論文中提出一觀點，闡述寬頻調整範圍與相位雜訊之兼顧關係。另外，本文亦提出一電路設計方法，可以在兩個明確的大範圍頻率間作快速切換。

In this thesis an operational amplifier based VCO was proposed. It was designed to generate frequencies ranged and tuned from 2.4G Hz to 5G Hz using 0.25/0.18μm CMOS process, with advantages of portability to various technologies and low gate counts. The proposed circuit has been simulated using ADS and, implemented and evaluated on a packaged chip with 0.25μm RF CMOS process. From simulation results, the VCO can operate in the range from 2.4G Hz to 5G Hz with the ability of fine-tuning within a narrow bandwidth. The phase noises are in the range from -48dBc/Hz to -64dBc/Hz at an offset of 100k Hz from the carrier frequency and, from -68dBc/Hz to -94dBc/Hz at an offset of 1M Hz. The measured operating frequencies are in the range from 1.12G Hz to 3.45G Hz with a large frequency shift due to circuit layout. The phase noises are almost the same as the simulation results. Besides, an aspect on the trade-off of wide frequency tuning range and phase noise was presented. And, a method to abruptly switch oscillation frequencies between two distinct and large extent of frequencies was developed.