完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Chang, Nelson | en_US |
dc.contributor.author | Lin, Ting-Min | en_US |
dc.contributor.author | Tsai, Tsung-Hsien | en_US |
dc.contributor.author | Tseng, Yu-Cheng | en_US |
dc.contributor.author | Chang, Tian-Sheuan | en_US |
dc.date.accessioned | 2014-12-08T15:09:22Z | - |
dc.date.available | 2014-12-08T15:09:22Z | - |
dc.date.issued | 2007 | en_US |
dc.identifier.isbn | 978-1-4244-1016-3 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/7157 | - |
dc.description.abstract | Real-time DSP stereo matching solution has been important to various applications relying on stereo vision. We proposed a 4x5 jigsaw matching template and the dual-block parallel processing technique to enhance VLIW DSP stereo matcher's performance. The 4x5 jigsaw template improves the matching quality by 1% compared with regular 4x5 block template while consuming the same amount of memory access bandwidth. Along with the benefit of the jigsaw template, the dual-block parallel processing technique, which doubles the throughput, is possible to be implemented for DSP. Together with instruction scheduling and operation pipelining, our DSP stereo matcher can achieve 50 FPS of 16 disparity levels for a 384x288 stereo image pair. Both quantitative and qualitative stereo matching results are provided at the end of this work. | en_US |
dc.language.iso | en_US | en_US |
dc.title | Real-time DSP implementation on local stereo matching | en_US |
dc.type | Article | en_US |
dc.identifier.journal | 2007 IEEE INTERNATIONAL CONFERENCE ON MULTIMEDIA AND EXPO, VOLS 1-5 | en_US |
dc.citation.spage | 2090 | en_US |
dc.citation.epage | 2093 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000252357704072 | - |
顯示於類別: | 會議論文 |