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dc.contributor.authorChang, Nelsonen_US
dc.contributor.authorLin, Ting-Minen_US
dc.contributor.authorTsai, Tsung-Hsienen_US
dc.contributor.authorTseng, Yu-Chengen_US
dc.contributor.authorChang, Tian-Sheuanen_US
dc.date.accessioned2014-12-08T15:09:22Z-
dc.date.available2014-12-08T15:09:22Z-
dc.date.issued2007en_US
dc.identifier.isbn978-1-4244-1016-3en_US
dc.identifier.urihttp://hdl.handle.net/11536/7157-
dc.description.abstractReal-time DSP stereo matching solution has been important to various applications relying on stereo vision. We proposed a 4x5 jigsaw matching template and the dual-block parallel processing technique to enhance VLIW DSP stereo matcher's performance. The 4x5 jigsaw template improves the matching quality by 1% compared with regular 4x5 block template while consuming the same amount of memory access bandwidth. Along with the benefit of the jigsaw template, the dual-block parallel processing technique, which doubles the throughput, is possible to be implemented for DSP. Together with instruction scheduling and operation pipelining, our DSP stereo matcher can achieve 50 FPS of 16 disparity levels for a 384x288 stereo image pair. Both quantitative and qualitative stereo matching results are provided at the end of this work.en_US
dc.language.isoen_USen_US
dc.titleReal-time DSP implementation on local stereo matchingen_US
dc.typeArticleen_US
dc.identifier.journal2007 IEEE INTERNATIONAL CONFERENCE ON MULTIMEDIA AND EXPO, VOLS 1-5en_US
dc.citation.spage2090en_US
dc.citation.epage2093en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000252357704072-
Appears in Collections:Conferences Paper