標題: | 未摻雜之氧化鋅薄膜電晶體的製作與特性分析 Fabrication and Characterization of Undoped-ZnO Thin Film Transistors |
作者: | 李信宏 Shin-Hung Li 林鴻志 黃調元 Lin, Horng-Chih Huang, Tiao-Yuan 電子工程學系 電子研究所 |
關鍵字: | 氧化鋅;ZnO |
公開日期: | 2013 |
摘要: | 本篇論文中,我們利用反轉堆疊式薄膜電晶體的技術成功地製作出氧化鋅薄膜電晶體。利用射頻濺鍍的方式製作氧化鋅薄膜,擁有製程溫度低、大面積均勻性佳等等的優點。此外,因為反轉堆疊式結構的製程步驟簡單與低成本,讓我們能夠進行不同沉積條件下的氧化鋅薄膜所造成的影響,其中包括氧氣流量、溫度控制和厚度控制。然後利用適切的製程參數製作的氧化鋅薄膜電晶體做進一步的分析,例如自由電子在電晶體通道裡產生的頻率響應。
此外,更進一步地討論氧化鋅薄膜電晶體的可靠度,包括了變溫量測、照光和電壓測試。我們觀察到在持續加正電壓情況下,因為閘極介電層內有很多缺陷易抓住電子而造成臨界電壓的正偏移;此外,我們也觀察到當有照光的情況下通道會產生很多的電子電洞對,使元件受影響。 In this thesis, we have successfully fabricated ZnO TFTs with the inverted-staggered structure. RF sputter method, which has merits of low manufacture temperature and good uniformity on a large scale, was employed to deposit the ZnO films,. Because of the simple fabrication processes on inverted-staggered structure, we can investigate the impacts of various deposition conditions on the ZnO films, such as the oxygen flow rate, substrate temperature, and ZnO thickness. Finally, the ZnO TFTs fabricated with suitable manufacture parameters were investigated further. In addition to the I-V measurements, multi-frequency C-V characterization is also performed. Subsequently, we also investigated the reliability of ZnO TFTs, including the dependence of measurement temperature, illumination and voltage stress. We observed obvious positive shift and little degradation of S.S. by the positive voltage stress, indicating that the shift is mainly caused by electron trapping in the gate dielectric. The effects of additional illumination were also explored. |
URI: | http://140.113.39.130/cdrfb3/record/nctu/#GT070050164 http://hdl.handle.net/11536/71831 |
顯示於類別: | 畢業論文 |