共振器耦合網路於射頻前端接收電路及太赫茲連接結構設計之應用

Abstract

本篇論文主要探討共振器耦合網路於低功率無線射頻前端接收電路及太赫茲連接結構設計之應用。本文針對共振器耦合網路進行詳細之理論探討，以建立有系統之設計流程。二個使用CMOS製程所實現之射頻前端接收電路及一個太赫茲連接結構設計之實驗結果，已成功驗證所提之共振器耦合技巧。一個系統級封裝之異質整合太赫茲訊號源，使用所提出之太赫茲連接結構進行封裝，模擬結果呈現高EIRP之絕佳性能。一個利用共振器耦合概念所延伸之寬頻鎊線連接結構也一併於此論文呈現。 本文先從共振器耦合網路之窄頻分析出發，分析包括電容式及電感式共振器耦合網路。當滿足臨界耦合條件，共振器耦合網路在共振頻率可產生和理想變壓器所能提供之一樣大小的最大被動增益，此增益不需要功耗，因此非常適合於低功率電路之應用。本文將共振器耦合技巧應用於一個使用0.18-μm CMOS製程之5.5 GHz前端接收電路之設計，在0.6伏特的操作電壓下，轉換增益可高達17.4 dB,功率消耗僅0.33毫瓦。 本文第二部分著重於電感式共振器耦合網路之寬頻特性，提供臨界耦合條件、被動增益、增益鋒值之頻率分離及漣波等分析式，以作為寬頻阻抗轉換設計之準則。此理論分析可適用於源極阻抗及負載阻抗不相等的情況。本文將電感式共振器耦合網路應用於一個使用0.18-μm CMOS製程之寬頻前端接收電路之設計，在操作電壓為1.2伏特下，3-dB頻寬可涵蓋20至30 GHz，最高的轉換增益為18.7 dB，功率消耗僅5.2毫瓦，僅使用了0.18 mm2的晶片面積。 寬頻太赫茲連接結構之設計乃將二個共振器，一個放置於晶片上，另一個放置於載具上，透過電磁場耦合而形成共振器耦合網路，以提供晶片和載具之間之寬頻訊號傳遞。太赫茲連接結構已成功驗證其於140至220 GHz之特性，在164 GHz可得到最小之0.47 dB插入損失。本文同時利用此連接結構將一個使用40奈米CMOS製程之三推式差動振盪器及載具上差動平板天線陣列整合於一個SU8載具上，以實現一個高效能系統級封裝之異質整合太赫茲訊號源。其中三推式差動振盪器已成功完成量測驗證：在操作電壓為0.9伏特下，可振盪於340.6 GHz，輸出功率為-11.3 dBm，僅消耗34.1毫瓦。模擬顯示：此異質整合之太赫茲訊號源可提供高達7.1 dBm之EIRP。 本文並從共振器耦合網路之耦合觀念，發展一個寬頻鎊線連接結構。同時於晶片及載具上放置傳輸線，組成一個多路徑之鎊線結構，可減緩單一鎊線頻寬受限的問題。本文設計一個從0.18-μm CMOS晶片至GIPD載具之連接結構，以驗證所提之技巧。量測顯示其頻寬可涵蓋直流至84 GHz。

This dissertation presents the application of a resonator coupling network (RCN) to low-power radio-frequency (RF) receiver front-end (RFE) and terahertz (THz) interconnect design. Theoretical analysis was conducted on the RCN to provide a systematic design flow with physical insights. To demonstrate the resonator coupling technique, two CMOS RFEs and a THz interconnect were designed and successfully verified by experimental results. A heterogeneously integrated THz signal source using the proposed THz interconnect for packaging was designed. Simulation shows excellent performance of high equivalent isotropically radiated power (EIRP). A broadband bondwire interconnect using a similar concept of a RCN is also presented in this dissertation. In the first place, theoretical analysis was conducted on the RCN, including capacitively coupled resonators (CCR) and inductively coupled resonators (ICR). Under the critical coupling, the RCN gives maximum passive gain at resonance frequencies, equivalent to the same level by an ideal transformer. This passive gain is appealing for low-power circuit design without consuming any power. An ICR was applied to a 5.5 GHz RFE design using 0.18-μm CMOS technology. The measured conversion gain can be as high as 17.4 dB while consuming only 0.33 mW from a 0.6 V supply. The second part of the dissertation focuses on the broadband behavior of an ICR. Analytic expressions for the critical coupling condition, passive gain, peak gain frequency separation, and ripple are presented to give design guidelines of wideband impedance transformation. The theory can handle the case of unequal source and load impedance. An ICR was employed to design a broadband RFE using 0.18-μm CMOS technology. Measured results show that the 3-dB bandwidth can span from 20 to 30 GHz with a peak conversion gain of 18.7 dB. The power consumption is only 5.2 mW from a 1.2 V supply while only occupying chip area of 0.18 mm2. For the broadband THz interconnect design, two resonators, one deployed on a chip and the other on a carrier, are coupled through electromagnetic filed to form a RCN, which can provide wideband signal transfer from a chip to a carrier. The interconnect performance was verified by experimental results from 140 GHz to 220 GHz. The minimum insertion loss is 0.47 dB at 164 GHz. The proposed interconnect was also exploited to design a high-performance THz signal source by heterogeneous integration of a differential triple-push oscillator using 40-nm CMOS and a patch antenna array on a SU8 carrier. The triple-push oscillator was successfully verified by experimental results. It can oscillate at 340.6 GHz with output power of -11.3 dBm. The power consumption is only 34.1 mW under a 0.9 V supply. Simulation indicates that the proposed heterogeneously integrated THz signal source can provide EIRP as high as 7.1 dBm. An idea of a broadband bondwire interconnect is inspired by the coupling concept of a RCN. Bandwidth limitation of a simple bondwire is alleviated in the proposed multi-path bondwire structure by adding transmission lines on both the chip and carrier. An interconnect from a 0.18-μm CMOS chip to a Glass-Integrated-Passive-Device (GIPD) carrier was designed to verify the proposed technique. Measured results show that the bandwidth can cover from DC to 84 GHz.