無合成器之LINC-OFDM系統:硬體設計與FPGA實現

Abstract

正交分頻多工(Orthogonal Frequency Division Multiplexing, OFDM)系統的傳送訊號有很高的PAPR(peak-to-average power ratio, PAPR)值，因此其功率放大器(power amplifier, PA)需有較大的線性放大區域使系統能正常操作，造成PA為射頻(radiofrequency, RF)電路中最消耗功率的元件。非線性元件之線性放大(Linear amplification with nonlinear component, LINC)技術為解決此問題的方法之一，LINC系統可使用效率較好的非線性放大器進行線性放大。然而，在LINC系統中有一關鍵的元件即功率合成器(power combiner)，其設計及實現有很高的難度，為了克服此問題有研究者提出無合成器之LINC系統。本篇論文利用現場可程式規劃閘陣列(Field Programmable Gate Array, FPGA)實現無合成器之LINC-OFDM系統。我們先為無合成器之LINC-OFDM系統傳送機與接收機設計低複雜度的架構。接著我們以硬體描述語言VHDL實現傳收機之運作模式，並以暫存器轉移層級(register transfer level, RTL)模擬驗證設計的正確性。產生的電路再進一步放置和繞線(place and route)，並下載至FPGA平台。最後將LINC-OFDM訊號透過射頻(Radio Frequency, RF)傳出與收回，確認我們的設計可以正常運作。

It is well known that the power amplifier (PA) of OFDM systems must operate in a wide linear region to cope with the high PAPR problem, making it the most power-hungry device in the RF circuit. The linear-amplification-with-nonlinear-component (LINC) technique, allowing the use of nonlinear PAs, has been developed to solve the problem. However, a critical component in LINC transmitter, named power combiner, is difficult to design and implement. A combinerless LINC system is recently proposed to avoid the problem. This thesis considers the implementation of a combinerless LINC-OFDM system with FPGA. We first design low-complexity architectures for a combinerless LINC-OFDM transmitter and receiver. Then, we implement the operations of the transceiver with the VHDL and conduct register transfer level (RTL) simulation to verify the correctness of the design. The resultant circuit is further placed and routed, and downloaded to a FPGA platform. Finally, experiments are conducted to transmit and receive LINC-OFDM signal through radio frequency (RF), confirming that our design can function properly.