Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | 劉威良 | en_US |
dc.contributor.author | Liu, Wei-Liang | en_US |
dc.contributor.author | 林進燈 | en_US |
dc.date.accessioned | 2014-12-12T02:36:21Z | - |
dc.date.available | 2014-12-12T02:36:21Z | - |
dc.date.issued | 2012 | en_US |
dc.identifier.uri | http://140.113.39.130/cdrfb3/record/nctu/#GT070058217 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/72886 | - |
dc.description.abstract | 嵌入式視覺跨足許多領域,諸如:工業應用、醫療器材、車用電子、安全監測及消費性電子產品等,其中,安全監測之應用為人類社會帶來更加安全的生活環境,物件偵測為安全監測的首要工作。現有軟體實現之物體偵測為達到即時偵測而做出些許犧牲,例如:縮小影像的尺寸、對於偵測有利的背景條件;大多數之硬體架構雖有顯著加速,但仍以侷限於對某種物體偵測、減少演算法中所使用之分類器或降低取樣數之方法來實現即時物體偵測。因此,十分需要設計出具即時處理高畫素影像功能之硬體架構。在本論文中,我們提出可調式單元架構,此架構允許不同單元之間可以同時平行且獨立運行,透過此架構,我們減少運算時間,減少採用降低取樣數法而採用更多放大特徵之途徑。此架構之設計基於AdaBoost演算法、藉由人臉偵測做為驗證、使用MIT+CMU的影像資料做為測試影像依據、以Xilinx XC7020為實現裝置並透過Xilinx ISE○R合成電路。本論文之架構可達到處理速度約為每秒130張影像,計算一張影像之處理起訖的方式為:以像素依序輸入為開始,而結束為將偵測結果輸出之時刻。由實驗結果可以看出,我們提出的架構保留實現其他物體偵測之空間和速度,並在人臉偵測之驗證中達到即時偵測的效果。 | zh_TW |
dc.description.abstract | Embedded vision spans a lot of markets and applications such as industrial, medical, automotive, security and consumer. Security surveillance is a significant application of embedded vision. Object detection is the first step to achieve this purpose. Existing software implementation of real-time object detection is based on small size images, favorable conditions in images. Mostly present hardware implementations are specific application, classifiers decreasing or images downscaling for achieving real-time processing. Therefore, it is necessary to design architecture that is capable to detect different objects under different scenarios in high resolution images. In this thesis, we propose cell-based parallel architecture permits each cell with parallel and independent execution. By exploiting this method, we accelerate the execute time, utilize fewer downscale images and more upscale features. The architecture is implemented by AdaBoost algorithm, verified by face detection utilizing MTI+CMU database, and synthesis by Xilinx ISE○R targets on Xilinx○R Zynq7000 XC7020. The proposed architecture achieves approximately 130 fps from receiving input image pixel by pixel to signing the candidate region. As result, we reserve area and time for applying multi-objects detection, and verify the architecture have ability to detect face in real time. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | 物體偵測 | zh_TW |
dc.subject | AdaBoost | zh_TW |
dc.subject | 平行處理架構 | zh_TW |
dc.subject | FPGA系統設計 | zh_TW |
dc.subject | object detection | en_US |
dc.subject | AdaBoost | en_US |
dc.subject | parallel architecture | en_US |
dc.subject | FPGA system | en_US |
dc.subject | Xilinx zynq | en_US |
dc.title | AdaBoost演算法之可調式FPGA單元架構設計與實現 | zh_TW |
dc.title | A Flexible Cell-based FPGA Architecture for AdaBoost Algorithm | en_US |
dc.type | Thesis | en_US |
dc.contributor.department | 影像與生醫光電研究所 | zh_TW |
Appears in Collections: | Thesis |