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dc.contributor.author李茂誠en_US
dc.contributor.authorLee, Mao-Chengen_US
dc.contributor.author胡樹en_US
dc.contributor.authorHu, Shu-Ien_US
dc.date.accessioned2014-12-12T02:36:21Z-
dc.date.available2014-12-12T02:36:21Z-
dc.date.issued2013en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#GT070050135en_US
dc.identifier.urihttp://hdl.handle.net/11536/72889-
dc.description.abstract類比數位轉換器在訊號處理中扮演不可或缺的角色,從高頻的通訊系統,到低頻的生醫訊號量測,處處可以看到類比數位轉換器的應用。隨著製成的進步,元件尺寸逐漸微縮至幾十個奈米(nm)等級,然而這個影響更加深了類比電路設計的難度。在傳統流行的管線式(pipelined)類比數位轉換器中,需要高性能的運算放大器來做殘值電壓放大的動作,因此隨著製成的演進,使得傳統管線式比數位轉換器的設計日益困難。在這種數位優勢增強,類比優勢漸弱的情況下,取而代之的是主要由大量數位電路所組成的逐漸逼近式(Successive Approximation Register)類比數位轉換器架構,SAR 類比數位轉換器除了在高解析度的應用有很好的表現以外,由於系統本身只存在一個類比比較器,SAR 架構目前也被廣泛的應用在低功率的系統當中。 在SAR 的架構中,數位類比轉換器往往是決定系統性能的關鍵區塊。本文提出兩種SAR 類比數位轉換器的架構,分別是使用R-2R 數位類比轉換器以及較常見的電容式數位類比轉換器,我們針對R-2R 架構設計了一顆10-bit 的類比數位轉換器系統,此外也對電容式架構設計了含有數位校正技術的12-bit 類比數位轉換器系統。我們使用TSMC 65nm 的製程技術,製作了一顆R-2R 架構以及兩顆電容式架構的晶片,並且針對電容式架構裡加入了兩種數位校正技術(比較器偏移電壓修正以及電容製成誤差校正),希望能藉由數位電路的技巧來修正彌補製程上物理的不理想因素。最後在文章的第四章以及第六章會有以上兩種SAR 架構的晶片量測結果以及討論。zh_TW
dc.description.abstractTo date ADCs play essential roles in the communication fields and in the bio-sensor applications. High-speed and low-power Analog-to-Digital converters (ADCs) are required in these applications. However, with the development of the CMOS technology, the design of high quality analog circuits becomes a challenge. The Successive approximation Register (SAR) architectures primarily consist of digital circuits. With this property, the SAR ADCs are more suitable fabricated in advanced CMOS technology than other structures. In this thesis, we present two SAR ADC architectures: a R-2R ladder DAC and a binary capacitive DAC. For the high speed applications, we chose a R-2R resistive DAC in our first work. We design a 10-bit R-2R ladder SAR ADC in TSMC 65nm CMOS technology. In addition, for the high resolution applications, we design a 12-bit capacitive SAR ADC in TSMC 65nm CMOS technology and we introduce two digital calibration technologies in this work.en_US
dc.language.isoen_USen_US
dc.subject類比數位轉換器zh_TW
dc.subject連續逼近式zh_TW
dc.subjectAnalog-to-Digital converteren_US
dc.subjectSuccessive Approximation Registeren_US
dc.title低功率連續逼近式類比數位轉換器之設計zh_TW
dc.titleDesign of Low Power Successive Approximation Register Analog-to-Digital Converteren_US
dc.typeThesisen_US
dc.contributor.department電子工程學系 電子研究所zh_TW
Appears in Collections:Thesis