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dc.contributor.author王漢樽en_US
dc.contributor.authorWang, Han-Tsunen_US
dc.contributor.author莊紹勳en_US
dc.contributor.authorChung, Steve S.en_US
dc.date.accessioned2014-12-12T02:36:39Z-
dc.date.available2014-12-12T02:36:39Z-
dc.date.issued2013en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#GT070050167en_US
dc.identifier.urihttp://hdl.handle.net/11536/72996-
dc.description.abstract近年來,氮化矽記憶體 (SONOS Memory) 是非揮發性記憶體的一大熱門探討主題,相較於傳統浮動閘極快閃記憶體 (Floating Gate Flash Memory),有著較簡單的結構、製程簡單,而且可以有更佳的微縮能力 (Scalability)。在本篇論文中,我們提出一種有效縮小電荷儲存節點大小之氮化矽快閃式記憶體。現今的快閃式記憶體,對低電壓操作、低功率操作、以及寫入速度等的要求愈來愈高。操作上,吾人利用通道熱電子 (CHEI: Channel Hot Electron Injection) 的寫入(program)機制及帶對帶電洞入射(BBHHI: Band-to-Band Tunneling Hot Hole Injection) 抹除(erase)機制來達到上述的要求。但由於入射的電子與電洞會產生錯位的情況,可能導致耐久度的可靠性問題,吾人將利用閘極-二極體 (Gated-Diode) ,來研究反覆寫入/抹除後造成耐久度下降的原因。 另一方面,資料漏失是氮化矽快閃式記憶體最為重要之可靠度議題。水平向與垂直方向之電荷漏失機制已被提出且爭論,因為對於傳統式氮化矽快閃式記憶體,水平方向和垂直方向之電荷漏失幾乎不可能分離出來。在本論文中,我們提出方法來探討電荷流失的路徑。藉由在不同的烘烤時間之下,監測隨機電報訊號以及電壓之間的變化,水平方向和垂直方向之電荷漏失即可被分離出來。我們觀察到,垂直方向的電荷流失是造成資料保存漏失的最主要原因。 最後,我們引入順偏壓電子注入方式FBEI (Forward Bias induced Electron Injection) 的操作方式。相較於傳統的操作方式, 由於FBEI的入射電子的分佈與BBHHI的入射電洞位置較為相似,且FBEI對氮與氧化層的傷害較小,所以FBEI具有較佳的耐久度及電荷保存特性。zh_TW
dc.description.abstractRecently, SONOS Memory has become more popular because of its simplicity in structure, process, and scalability by comparing with conventional floating gate cells. In this study, a U-MTP (U-Shaped Multi-Time-Programming) SONOS flash memory with an effective shrinking of the storage node size has been proposed. Nowadays, the requirements of flash memory, low voltage operation, low power consumption, and high speed are becoming increasingly important. By using the conventional programming scheme of channel hot electron injection and erasing scheme of band-to-band tunneling hot hole injection, we can achieve these requirements. But the mismatch of the injected electrons and holes could cause the endurance issue. The gated-diode method has been employed to investigate the cause of window degradation after P/E cycling. The charge loss in nitride based charge trapping memory has also been a major reliability issue. The charge loss mechanisms have been published and uncertain whether the leakage path is along the lateral or vertical direction, since it is impossible to separate the two directions loss for conventional structure. In this paper, we propose a method to investigate the charge loss path. By monitoring the change of RTN and threshold voltage shift after different baking times of the U-MTP structure SONOS, the electron or hole distribution can be identified, and the lateral and vertical retention loss can be separated. It was observed that the vertical leakage is the main cause of retention loss. Finally, we introduce an operation scheme, FBEI (Forward Bias induced Electron Injection) for the cell programming. Comparing to conventional schemes, this FBEI scheme has better endurance and data retention as a result of the better match of programming/erasing scheme and lower nitride/oxide damage.en_US
dc.language.isoen_USen_US
dc.subject快閃式記憶體zh_TW
dc.subject耐久性zh_TW
dc.subject資料保存zh_TW
dc.subjectFlash Memoryen_US
dc.subjectSONOSen_US
dc.subjectEnduranceen_US
dc.subjectRetentionen_US
dc.titleU型多重讀寫氮化矽快閃式記憶體之耐久性及資料保存探討zh_TW
dc.titleThe Investigation of Endurance and Data Retention for U-Shaped MTP SONOS Flash Memoryen_US
dc.typeThesisen_US
dc.contributor.department電子工程學系 電子研究所zh_TW
Appears in Collections:Thesis