應用於數位微流體生物晶片之 多功能環狀架構暨對應之一站式合成演算法

Abstract

數位微流體生物晶片是近年來的一個新發展，其可以用來替代傳統在一般 實驗室中昂貴且笨重的儀器。而數位微流體生物晶片中的主流設計為矩陣式生物晶片，在於其上發展的設計流程可以歸類成兩步驟：第一步驟為流體層級而另一步驟為晶片設計。在一開始，流體層級決定了生醫晶片上的流體行為，像是操作的排序，模組的放置和液滴的路徑。之後，晶片設計則是處理在製造晶片中所遭遇到的困難，像是控制線的分配以及繞線。之前的研究指出因為現存的處理流體層級方法並沒有考慮到晶片設計而造成無法保證能夠完成成功的設計流程。然而，在我們看來，由於相互依存的關係，其結果由前端流體層級步驟（例如，操作的排序）也可能使後端流體層級步驟失敗（例如，模塊的擺放位置和液滴路徑）。為了克服此問題，我們建構了一個可以被大部分生物應用所採納的多功能環狀架構，VERBA。相對於一般矩陣式架構，VERBA可以被作為一個通用平台來達成一站式合成。除此之外，我們還提供了一個縮短延遲的儲存感測式排序演算法，簡稱SAS。實驗結果展示了其應用現存演算法於VERBA上，不只是可以保證達成一站式合成，並且也能有相同好的表現在於矩陣式的架構上。然而應用SAS於VERBA 上更可以得到好的實驗數據。因此多功能環狀架構暨對應之一站式合成演算法是非常可行於數位微流體生物晶片設計。

Digital microfluidic biochip (DMFB) is one of the most attractive research topics in recently years. It can substitute for conventional instruments in laboratories which are very expensive and bulky. The mainstream design of DMFBs is the array-based biochip, and its design flow can be divided into two major stages: fluidic-level synthesis and chip-level design. The first part, fluidic-level synthesis, determines the behavior of fluidics on a chip, like operation scheduling, module placement, and droplet routing. In contrast, chip-level design deals with the problems associated with DMFB manufacturing, such as control pin assignment and wire routing. Previous works point out that the existing methods for fluidic-level synthesis do not take care of chip-level design issues and thus cannot guarantee a successful chip-level-design solution. However, in our opinion, the result determined by front-end fluidic-level synthesis step (e.g., operation scheduling) may also make the back-end synthesis step failed (e.g., module placement and droplet routing) owing to their interdependency. To overcome this problem, we propose construct a new versatile ring-based architecture, VERBA, which is adaptive for most bio-applications. Different from array-based DMFBs, VERBA can be utilized as a robust platform for fluidic-level synthesis to achieve one-pass synthesis. Besides, we further propose a storage-aware scheduling algorithm, named SAS, for latency minimization. Experimental results show that VERBA not only guarantee one-pass synthesis but also can behave as well as array-based DMFB by using existing synthesis algorithms. Moreover, SAS can provide even better scheduling result on VERBA. As a result, our architecture VERBA and the corresponding scheduling algorithm SAS is definitely considerable in DMFB design.