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dc.contributor.author孫至鼎en_US
dc.contributor.authorSun, Chih-Tingen_US
dc.contributor.author李育民en_US
dc.contributor.authorLee, Yu-Minen_US
dc.date.accessioned2014-12-12T02:36:59Z-
dc.date.available2014-12-12T02:36:59Z-
dc.date.issued2013en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#GT070060315en_US
dc.identifier.urihttp://hdl.handle.net/11536/73083-
dc.description.abstract在三維積體電路的電源供應網路設計中,相較於二維積體電路的電源供應網路設計,電流密度增加了許多,也多了矽穿孔(through silicon vias)的考量,這些效應在其中有著重要的影響。在這篇論文中,我們採用了非均勻的網格結構,藉由改變網格數和增加線寬以期資源利用的最大化。其中,我們提出了兩個可變動參數來調整不均勻的電流密度分布和矽穿孔擺放的效率,這使得我們有著高度的適應性來處理各種不同狀況的案例。我們也提出了一些方法來簡化設計流程,進而減少電路模擬的次數。實驗結果顯示,相較於均勻的網格結構,我們提出的方法可以節省將近平均67.5%的網格使用面積,而在同樣的壓降限制底下,矽穿孔的使用數量在控管之下也少得多。zh_TW
dc.description.abstractThe increased current density and the consideration of through silicon vias (TSVs) play important roles in three-dimensional power delivery network design. In this work, we use non-uniform power grid structure to make the full use of resources by varying wire sizes and grid numbers. Two parameters are developed to optimize the design that one is for unbalance current density distribution, and the other is for the efficiency of TSV insertion. These provide high adaptability to handle varied cases. Heuristic methods are also developed and implemented to simplify the design process and save simulation times. The experimental results show that the developed method can save almost 67.5% power grid area in average than uniform structure and use much fewer TSVs while still satisfying IR drop constraint.en_US
dc.language.isoen_USen_US
dc.subject三維積體電路zh_TW
dc.subject設計zh_TW
dc.subject電源供應網路zh_TW
dc.subject3D ICen_US
dc.subjectPoweren_US
dc.subjectGounden_US
dc.subjectDesignen_US
dc.title高適應性三維積體電路電源供應網路設計最佳化zh_TW
dc.titlePower Delivery Network Optimization with High Adaptability in 3D ICen_US
dc.typeThesisen_US
dc.contributor.department電信工程研究所zh_TW
Appears in Collections:Thesis