完整後設資料紀錄
DC 欄位語言
dc.contributor.author陳柏鈞en_US
dc.contributor.authorChen, Po-Chunen_US
dc.contributor.author曾俊元en_US
dc.date.accessioned2014-12-12T02:37:56Z-
dc.date.available2014-12-12T02:37:56Z-
dc.date.issued2013en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#GT070060508en_US
dc.identifier.urihttp://hdl.handle.net/11536/73391-
dc.description.abstract本文研究內容主要是以W CVD所成長之鎢做為底電極材料,再利用射頻濺渡法沉積絕緣層氧化鋯。其結構以鈦/氧化鋯/鎢為基礎,量測其電性特性,探討如何改善。改善方向為更換不同的上電極對於電阻式記憶體的轉態特性與變化,並探討更換上電極後藉由自由能的不同所帶來的影響。另一方面是加入緩衝層氧化鈷,使介面層的自由能差異更大,來探討緩衝層對於原本的結構所帶來的特性與影響。 以鋁為上電極是利用其與自由能差異造成與氧結合之多寡的特性區別來探討轉態的變化。當上電極是鋁時,由於鋁容易與氧離子結合,且自由能遠大於鈦故容易與氧化鋯中的氧離子結合成氧化鋁,使轉態層偏向在鋁電極與氧化鋯之介面,藉此減少其轉態時的變化。且以鋁/氧化鋯/鎢此方式做成的結構有著低功率、低成本的明顯優點。因此以Al做為上電極研究中,在沉積氧化鋯時分別以室溫、100、150、200℃四種溫度來沉積,藉由沉積絕緣層之溫度高低控制氧化層中缺陷多寡,發現到在室溫沉積時具有最多的轉態次數,然而隨著製程溫度的增加操作次數卻明顯減少,但此時高低阻態比例明顯提升。實驗中透過氧化層厚度改變及不同製程溫度的調整希望得到最佳條件,藉以改善至高低阻態的比例及提升耐久度。 除了透過鋁電極使用外,我們在鈦與氧化鋯中間加入一層薄薄的氧化鈷作為緩衝層,增加其活性金屬鈦有效的與氧化鋯反應。經由加入這一層後緩衝層可以有效的改善元件特性,能提高轉態次數、降低轉態變化、拉大阻態比例。藉由材料分析後能發現氧化鈷在當中的角色,藉由自由能差異變大使鈦大量的與氧離子結合,而氧化鈷薄膜則是擔任傳遞的重要角色。zh_TW
dc.description.abstractThe thesis mainly focuses on ZrO2-based RRAM with tungsten bottom electrode. I discuss the Ti/ZrO2/W structure with its electrical properties and find the way to improve the characteristics. Thus, I change different top electrode and study on the change of RRAM’s characteristics. I want to figure out different Gibb’s free energy of respective electrode would bring what influence on the characteristics. On the other hand, adding CoO layer would enlarge the difference of Gibb’s free energy in the interface, and I want to discuss with how to influence the original structure by adding this buffer layer. Using Al as my top electrode, I could utilize Gibb’s free energy difference to control the amount of its combination with oxygen. When I use Al as top electrode, because of Al being easy to combine with oxygen and its Gibb’s free energy greatly larger than Ti, Al would combine with oxygen in ZrO2 to form Al2O3. Furthermore, the transition region would tend to be the interface of Al electrode and ZrO2, and thus lower down the variation during transition. The structure of Al/ZrO2/W has the advantage of low power, low cost and moreover less variation during transition, and as a result I could easily judge the position where oxidation and reduction would happen. ZrO2 was deposited in the temperature of room temperature, 100℃, 150℃ and 200℃, respectively. I can control the amount of vacancies by controlling the deposition temperature of transition layer. The endurance is the best in room temperature. However, endurance and resistive ratio are tradeoff. When the deposition temperature increases, the endurance would decrease while ratio would be larger. As a result, I try to change temperature and hope to strike a balance between endurance and resistive ratio. Finally, my device has higher endurance and higher resistive ratio and can be practically applied. By means of adding CoO layer between Ti and ZrO2 as a buffer layer, I can increase the activity of Ti to react with ZrO2. Once I add this buffer layer, and the performance of this structure can be effectively developed—higher endurance, lower resistive transition variation and larger resistive ratio. Moreover, I can find the role of CoO layer by material analysis. Through enlarging the difference of Gibb’s free energy, Ti electrode would combine with oxygen ion in large quantity.en_US
dc.language.isozh_TWen_US
dc.subject非揮發性記憶體zh_TW
dc.subject電阻式記憶體zh_TW
dc.subject氧化鋯zh_TW
dc.subject鎢電極zh_TW
dc.subject阻態轉換zh_TW
dc.subjectNon-Volatile Resistive Memoryen_US
dc.subjectResistive Random Access Memoryen_US
dc.subjectZrO2en_US
dc.subjectW Electrodeen_US
dc.subjectResistive Switchingen_US
dc.title非揮發性氧化鋯電阻式記憶體於鎢電極之結構與特性研究zh_TW
dc.titleProperties of W Electroded ZrO2-based Non-Volatile Resistive Memoryen_US
dc.typeThesisen_US
dc.contributor.department電機學院電子與光電學程zh_TW
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