功率電晶體可靠度分析與自我溫度平衡機制

Abstract

本論文分析整合型功率電晶體，即為多顆子功率電晶體組成的功率電晶體串，其在電力線、負載線和地線不同佈局下，會產生不同的功率分布，而功率較大子功率電晶體所產生的熱也較大，造成子功率電晶體壽命下降。為了解決此問題，本論文提出了主動調整機制來達到功率電晶體自我溫度平衡機制來改善功率分布不均的現象。自我溫度平衡機制利用環型振盪器感測出每一顆子功率電晶體溫度，因為溫度變化慢，故將環型振盪器操作在次臨界區，除了大幅降低振盪頻率，也擁有好的溫度解析度與低功率消耗。找尋到最大溫度的子功率電晶體後再透過閘極脈波擷取電路，將最高溫的子功率電晶體做部分脈波擷取來降低其責任週期達到短暫休息的目地，使其溫度降溫，提高可靠度。 本論文使用了TSMC 0.25um製程，整體系統操作頻率為500Khz，功率消耗為54.03uW，晶片佈局面積為2206.91um*1000um。

This thesis analyzes combinative Power MOS, which is constructed by many small MOS transistor. Depending on the layout between power line, ground line and the load. It will cause different distribution of power. When a small cell has large power dispassion, it produces more heat. It will reduce the life of the small cell. This thesis proposes a active adjustment scheme and a self-balancing method to improve the reliability. The self-balancing method of Power MOS uses temperature sensors to sense the temperature of each small cell. Because the temperature changes slowly, so it operates in near subthreshold region for low frequency and high resolution. Beside it also has low power dissipation. It finds the cell with the maximal temperature. Finally, clock gating circuit take off pulses from the transistor to reduce its duty cycles and temperature cooler. The chip is implemented in TSMC 0.25um process. The whole system operates at 500Khz, the power dissipation is 54.03uW and the chip area is 2206.91um*1000um.