標題: 應用於通用繪圖處理器之多核心計算單元設計與實作
Design and Implementation of Multicore Compute Unit for GPGPU
作者: 張庭翰
Chang, Ting-Han
范倫達
Van, Lan-Da
資訊科學與工程研究所
關鍵字: 繪圖處理器架構;通用繪圖處理器;計算單元;GPU architecture;GPGPU;compute unit;OpenCL
公開日期: 2013
摘要: 在此篇論文中,實作一個用於硬體功能驗證簡化型的三維繪圖API,以及設計一個應用於通用型繪圖處理器的計算單元硬體架構。簡化型三維繪圖API提供一個類OpenGL的三維繪圖程式設計環境,使運行於計算單元上之程式驗證與硬體模擬更加簡單。它亦是被建立為一個用於三維圖學應用程式之軟硬體合作環境。計算單元硬體架構基於OpenCL,提供了通用計算基本的功能與硬體環境。預期此設計可以與其它圖學特殊硬體,如光柵渲染器與材質單元整合,以形成一個完整的通用繪圖處理器架構。工作項處理核心-WIPCore是一個基於MIPS的流水線架構。IDReg提供了在OpenCL之單指令多執行序程式中之ID運算支援。而自助餐式分配法及最小程式計數器優先排程法,增加了在共享指令記憶體的狀況下之效能。
In this thesis, a simplified 3D graphics API for hardware function verification and a compute unit (CU) hardware architecture for GPGPU are presented. The simplified 3D graphics API provides an OpenGL-like environment for 3D graphics programming. It makes program verification and hardware simulation of compute unit easier. The hardware-software co-work environment for 3D graphics applications is established. The CU hardware architecture supports basic functions and hardware environment of general purpose computing based on OpenCL. It is expected to integrate other specific graphics hardware components such as rasterizer and texture unit to become a complete GPGPU architecture. The work-item processing core (WIPCore) is obtained by modifying the MIPS pipeline architecture. IDReg provides the support of ID operations in OpenCL SIMT programs. The buffet dispatching method and minimal-pc-first scheduling method increase the performance of the shared instruction memory.
URI: http://140.113.39.130/cdrfb3/record/nctu/#GT070056052
http://hdl.handle.net/11536/73961
顯示於類別:畢業論文