標題: 一個60GHz 功率放大器,輸出功率19.6dBm 和一個 35GHz 相位陣列接收機
A 60GHz Power Amplifier with +19.6dBm Psat in 40nm CMOS and a 35GHz Phased Array Receiver in 65nm CMOS
作者: 曾乾瑋
Tseng, Chien-Wei
王毓駒
Wang, Yu-Jiu
電子工程學系 電子研究所
關鍵字: 功率放大器;Power amplifier;60GHz
公開日期: 2013
摘要: 隨著多媒體產品的廣泛應用,無線通訊系統對高速資料傳輸的需求日漸快速 的增加。為了解決這問題,免執照頻段在60GHz 提供了7GHz 的頻寬可以進行 短距離的高速傳輸,以及多天線相位陣列的傳輸系統提供了一些解決辦法。在此 篇論文中,我們將介紹60GHz 頻段和35GHz 多天線相位陣列兩種不同頻段的電 路製作。 首先將介紹一個操作在60GHz 的40 奈米CMOS 高頻功率放大器。傳統的 單顆功率放大器受限於高頻的功率增益不夠,輸出功率過小。為了要提高輸出功 率,單晶片多顆功率放大器的功率合成網路開始廣泛的研究。此篇論文採用了變 壓器類型的功率合成網路製作在40 奈米CMOS 上,可以達到19.6dBm 的輸出功 率,21%的功率附加效益,及12GHz 的頻寬。 第二部分將介紹一個操作在 35GHz 的65 奈米CMOS 四通道可延展相位陣 列接收機。此相位陣列接收機採用直接降頻的架構,搭配基頻的相移器完成波束 成行。為了減少四通道的繞線複雜度,本地震盪器的採用駐波震盪器(SWO)的架 構。每一通道可以達到51dB 的增益,7.3dB 的雜訊指數,以及8dBm 的三階輸出交調節取點。
With the emergence of variety of multimedia applications, the requirement of high data rate wireless communication is increasing. The unlicensed band of 60GHz offering 7GHz bandwidth has drawn much interest recently in high-speed short-range wireless communication. On the other hand, phased-array systems, a special case of multiple-input and multiple-output (MIMO) using multiple antennas at both transmitter and receiver, presents another opportunity for increasing transfer data-rate and spectral efficiency. This thesis is dedicated to presenting these two commonly use methods to implement microwave integrated circuit in silicon-based technologies. At the first part, a 60GHz 40nm CMOS power amplifier is presented. Single power amplifier is limited by the power gain at high frequency. To increase the output power, transformer-based power combining techniques is used in this design. With efficient combining network, the power amplifier is capable of generating 19.6dBm iv output power, 21% power added efficiency and 12GHz bandwidth. At the second part, a 35GHz 65nm CMOS scalable four-element phased array receiver is presented. The phased array receiver utilizes a homodyne topology and employs analog baseband phase shifting architecture. To simplify the local oscillator routing, the direct-coupled standing wave oscillator array is used in this design. Each signal path achieves a gain of 51dB, a noise figure of 7.3dB, and an OIP3 of 8dBm.
URI: http://140.113.39.130/cdrfb3/record/nctu/#GT070050193
http://hdl.handle.net/11536/73976
顯示於類別:畢業論文