完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | 徐盛泰 | en_US |
dc.contributor.author | Hsu, Sheng-Tai | en_US |
dc.contributor.author | 吳耀銓 | en_US |
dc.contributor.author | Wu, Yew-Chung Sermon | en_US |
dc.date.accessioned | 2014-12-12T02:40:01Z | - |
dc.date.available | 2014-12-12T02:40:01Z | - |
dc.date.issued | 2013 | en_US |
dc.identifier.uri | http://140.113.39.130/cdrfb3/record/nctu/#GT070061320 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/74180 | - |
dc.description.abstract | 本論文研究主要為探討TEOS氣體在垂直式爐管內以低壓化學氣相沉積方式成長溝槽式閘極金氧半場效電晶體之閘極氧化層製程,並予以改善進而達到可量產的最佳化條件。共可分為三個主要部分:首先研究此低壓化學氣相沉積製程當壓力控制在1.3torr與垂直式爐管反應室由於反應氣體濃度由下而上遞減的差異影響位於反應室上方所沉積的氧化層厚度呈現碗狀分佈而下方位置所呈現牛眼狀分佈,此晶片面內厚度與晶片對晶片的不均勻性將限制其產能,實驗以增加晶片間距22.8%的方法改善氧化層800Å製程的均勻性位於反應室中央區域改善幅度達58.7%,此結果最佳均勻性位置為反應室中央以及中央下方,設定此二位置進行溝槽式閘極氧化層製程。其次為降低溝槽式閘極金氧半場效電晶體的導通電阻在溝槽內所成長之閘極氧化層其側壁與底部厚度需均勻,避免閘極氧化層過薄所導致崩潰於該處的現象,利用控制TEOS流量/製程壓力/溫度三個參數得到相同的側壁與底部氧化層沉積速率。最後探討溝槽式閘極金氧半場效電晶體其U型溝槽結構在成長氧化層製程時所產生的負載效應,隨著晶片數量以及晶片內元件的密集程度的增加而增加的反應面積將使得晶片所在區域沉積速率下降,以相同製程條件下與平面的晶片在沉積厚度上的差異比較,U型溝槽結構之晶片25片其負載效應為6.49%、50片為12.09%,必須增加製程溫度與沉積時間以抵銷負載效應達到目標厚度。為了達到量產的目的,在製程監控方面制定了以控片厚度監控產品的方法,搭配負載效應根據不同晶片數量的組合給予不同的生產條件。 | zh_TW |
dc.description.abstract | This paper is mainly investigate TEOS gas at the vertical furnace LPCVD method to grow UMOSFET gate oxide process, and improved to achieve production condition. Can be divided into three main parts: First, research of this TEOS LPCVD process when the pressure controlled at 1.3torr and the vertical reaction chamber due to reaction gas concentration decreasing from bottom to top zone, this difference affect the deposition thickness distribution of reaction chamber top zone is bowl shaped and bottom zone is bull's-eye shaped, these wafer to wafer and within wafer non-uniform thickness distribution will limit process production capacity, Experiment to increase 22.8% wafer spacing method to improve the uniformity of the 800Å process of improving a rate of 58.7% at center area in reaction chamber, the best result for the uniformity of the reaction chamber are center and the center-bottom zone, set these two position to grow trench gate oxide process. Second, in order to reduce the on-resistance at UMOSFET, growth gate oxide layer in the trench which requires a uniform thickness of the sidewall and bottom side, to avoid too thin gate oxide layer and breakdown at this area, controlled TEOS flow rate / process pressure / temperature three parameters obtained the same bottom and sidewall oxide layer deposition rate. Finally, discussion the UMOSFET Loading Effect of its U-shaped trench structure when growth oxide layer process, as the number of wafers and density of the cells increases the reaction area will increases, this makes the area where the wafer deposition rate decreased, comparison the thickness differences under the same process conditions with use bare wafer, U-shaped trench structure wafer 25pcs loading effect to 6.49%, 50pcs to 12.09%, need to increase process temperature and deposition time to reach the target thickness. In order to achieve the purpose of production, at process monitor, use the monitor thickness control the products thickness, with the loading effect given different production conditions, depending on the number of U-shaped wafers. | en_US |
dc.language.iso | zh_TW | en_US |
dc.subject | 溝槽式閘極金氧半場效電晶體 | zh_TW |
dc.subject | 垂直式爐管四氧乙基矽低壓化學氣相沉積 | zh_TW |
dc.subject | 閘極氧化層製程 | zh_TW |
dc.subject | UMOSFET | en_US |
dc.subject | VERTICAL FURNACE TEOS LPCVD | en_US |
dc.subject | GATE OXIDE PROCESS | en_US |
dc.title | 溝槽式閘極金氧半場效電晶體閘極氧化層製程之改善 | zh_TW |
dc.title | Improvement of Trench Gate MOSFET Gate Oxide Process | en_US |
dc.type | Thesis | en_US |
dc.contributor.department | 工學院半導體材料與製程設備學程 | zh_TW |
顯示於類別: | 畢業論文 |