應用二氧化矽介面層改善二氧化鈦電阻式記憶體的功率開關特性

Abstract

隨著科技日益發展，非揮發性記憶體在日常生活中扮演一個很重要的腳色，例如:行動電話、數位相機、可攜式裝置。其中快閃記憶體被視為目前主流，根據ITRS可知快閃記憶體的穿隧氧化層是否能繼續微縮是目前技術的關鍵，隨著厚度變薄(小於10奈米)載子容易流失，這會導致控制不易或資料讀取錯誤，為了解決這個問題，目前有許多新世代的記憶體出現，例如相變化隨機存取、鐵電隨機存取記憶體、磁性隨機存取記憶體和電阻式隨機存取記憶體，其中電阻式記憶體具有發展淺力，它具有低操作電壓、高操作速度、低功耗、高度整合和簡單結構……等。 此篇論文的研究，我們報告指出在镍/二氧化鈦/氮化鉭單層電阻式記憶體中加二氧化矽當作介面層可以改變元件特性，比較鎳/二氧化矽/二氧化鈦/氮化鉭和鎳/二氧化鈦/二氧化矽/氮化鉭兩種結構，鎳/二氧化鈦/二氧化矽/氮化鉭結構特性較差，因為二氧化矽和氮化鉭中間產生未知介面層可能會捕捉電子。鎳/二氧化矽/二氧化鈦/氮化鉭結構的特性較好，開關電阻比大於224，和單層結構的鎳/二氧化鈦/氮化鉭相比有較低的功率電阻式開關為5.7毫瓦 (1.9毫安培，3伏特)，好的耐受力（100個週期），資料保存時間（104秒 溫度85度），溫度對此結構影響不大。

With the technology development, non-volatile memory (NVM) plays an important role in our daily life, such as mobile phones, digital cameras and portable device. The flash memory nowadays is considered as the mainstream. The key issue for flash memory is the scaling of the tunneling oxide. After a long-time operation, thin tunneling oxide (<10nm) also cause the charge lost in the floating gate so it leads to sever control and readout hazards. Many advanced non-volatile memories become the next generation memories to solve these issues, such as phase-change memory (PCM) [1], ferroelectric random access memory (FeRAM) [2], magnetic random access memory (MRAM) [3], and resistive random access memory (RRAM) [4]. The resistive random access memory (RRAM) shows a great potential, due to its low operation voltage, high-speed switch, low power, high density integration and simple structure, etc. In this study, using SiO2 as buffer layer in Ni/TiO2/TaN structure can change the characteristic of device . Compared with Ni/TiO2/SiO2/TaN and Ni/SiO2/TiO2/TaN, The property of Ni/SiO2/TiO2/TaN is worse because of interface trapping between SiO2/TaN. Ni/TiO2/SiO2/TaN has better data.. Resistance ratio >224 at 0.5V, a lower set power value 5.7mW (1.9mA at 3V), compared with TiO2 single layer RRAM, good endurance (100cycle), good retention with a small HRS/LRS decay for 104 sec was measured at 85C.,and the device is insensitive to temperature.