薄膜輪廓工法－氧化鋅薄膜電晶體之製作與特性分析

Abstract

在本篇論文中，我們利用薄膜輪廓工法技術的概念成功製作出一個嶄新結構的氧化鋅薄膜電晶體，此結構的優勢在於僅需要一道光罩即可完成電晶體製作。為了更進一步地了解此新結構，我們對於元件在不同的通道長度及不同的扇出(fan-out)型態下進行討論。我們也探討了不同沉積壓力條件對於元件的影響，由於此特殊的結構設計，壓力控制扮演了很重要的角色，我們可藉由調變不同材料間的沉積壓力使達到自我對準的薄膜電晶體結構。為了降低源極/汲極的寄生電阻來達到提升元件特性的目的，我們也討論了有關氬元素電漿處理對於元件特性的影響，源極/汲極區的氧化鋅在經過處理後會進一步地形成一層高載子濃度的氧化鋅薄膜。此外，我們也利用薄膜輪廓工法技術的概念成功製作出了實際通道長度為73nm的短通道薄膜電晶體。

In this thesis, we have successfully realized a new structure of ZnO TFTs fabricated using a novel film-profile engineering (FPE) concept, which has the merit of employing only one mask. In order to better understand about the new structure, we study the effects of different structural parameters such as channel length and types of fan-out layout of the devices. Effects of deposition pressure also have been studied. For the purpose of reducing parasitic source/drain (S/D) resistance to improve the electrical performance, we also study the impacts of the Ar plasma treatment on the S/D contact areas of the devices. Moreover, by combining film-profile engineering and method of photoresist trimming, a TFT with practical channel length of 73 nm and was realized.