應用於三相變頻器以FPGA為基礎數位電流控制器之研製

Abstract

本文設計和實現一個基於數位FPGA的數位電流控制器，針對三相變頻器提供高效能之整合方案。透過此晶片來實現死區補償和單電阻電流取樣以及同步坐標軸電流控制算法。首先，相較於三種典型的PWM方法，SPWM、SVPWM和DPWMMIN，DPWMMIN策略是採用在控制器下的線性範圍調製和開關損耗的考慮，在DPWMMIN方案中，線性調變範圍相較於SPWM擴大至約15.5％，且每一開關週期只使用到兩臂之開關做切換，因此DPWMMIN有較小的開關損失。其次，在脈寬調變策略中需要死區時間是以防止上下臂開關短路。然而變頻器操作在低調變指標時，其blanking time(消隱時間)會造成其輸出電壓有明顯的失真。針對DPWMMIN發展出dead time補償技術，藉由此補償策略，輸出電壓之脈寬在每個開關週期被修正且無位置偏移。第三，在寬負載的變化範圍內為達到可靠的電流感測和低電流失真，單電阻電流取樣(One-shunt current sampling)在實際應用面上是個極大的挑戰。單電阻電流取樣電流重建相電流可以由有效電壓向量的短時間區間來推出其邊界條件，一個簡單的取樣技術被引入以實現從直流鏈電流的DPWMMIN策略以取到正確三相電流信息。最後，同步旋轉座標電流控制算法的核心是座標變換，這需要多個乘法器的實現。然而，如果用一般的乘法器來實現乘法，則沒有辦法可以達到低成本小面積的要求。為了克服這個限制，本文分享乘法器來減少FPGA專用乘法器的數量。實驗結果已藉由使用ARM基礎混合訊號FPGA PSOC控制器，即SmartFusion A2F500M3F來驗證先前提到IC的表現。

This thesis presents the design and implementation of an FPGA-based digital current controller, providing a fully integrated solution for high-performance three-phase inverters. The synchronous coordinate current control algorithm is realized with dead-time compensation and one-shunt current sampling by using the introduced controller. First of all, DPWMMIN strategy is employed in the controller under considerations of linear range modulation and switching losses, based on the evaluation of three typical PWM methods, SPWM, SVPWM and DPWMMIN. In the DPWMMIN scheme, the linear modulation range is allowed a 15.5-percent increase in comparison with SPWM. Moreover, on/off switching occurs in only two phase legs each switching cycle, thus the DPWMMIN method introduces less switching losses. Secondly, dead time is required in the standard PWM inverter control to prevent dc-link short circuit. However, this blanking time also results in distortion in output voltage and it becomes quite significant for inverters under low modulation index. A dead-time compensation technique is developed for DPWMMIN. By using the compensation scheme, the width of output voltage pulses is corrected in every switching cycle without position shift. Thirdly, one-shunt current sampling imposes practical implementation challenges for reliable current sensing and low current distortion over wide load variation ranges. Boundary conditions for phase current reconstruction with one-shunt current sensing have been derived from small time intervals of effective voltage vectors. A simple sampling technique is introduced to achieve correct three-phase current information from dc-link current for the DPWMMIN strategy with a minimum of undesirable side effects. Finally, the core of the synchronous coordinate current control algorithm is the coordinate transformation, which needs several multiplications for realization. However, if a dedicated multiplier is used for each multiplication, the cheaper and smaller FPGAs cannot meet the logic resource requirement. To overcome this limitation, a multiplier-sharing strategy is used, which can reduce the number of dedicated multipliers in the FPGA. Experimental verification has been given to illustrate the performance of the proposed controller by using ARM-based mixed-signal FPGA PSOC board, SmartFusion A2F500M3F.