應用於非晶矽薄膜電晶體液晶顯示器之閘級驅動電路陣列技術

Abstract

在現今的科技生活中，人們對於顯示器的品質需求越來越多，無論是畫面品質或是產品外觀。因此System-on-panel的技術已成為發展的重點，此技術不但可節省製造成本與提高良率並且具有縮減產品模組、實現高可靠度與高解析度顯示器等特性。而在薄膜電晶體液晶顯示器(thin-film transistor liquid-crystal display，簡稱TFT-LCD)驅動系統中，閘極驅動電路，gate drivers(或稱掃描驅動電路，scan drivers)，主要負責將畫面上一列列的電晶體依序打開，讓資料電壓能夠進入到液晶及儲存電容內。近來，在消費性產品中，閘極驅動電路部分已高度整合於下層玻璃基板，而非傳統使用IC晶片的型式。目地在於降低成本與使LCD模組更輕薄，雖然非晶矽薄膜電晶體(a-Si TFTs)的電子遷移率低，但其高均勻性及低成本，適合閘極驅動電路的實現。

在此篇論文中，提出兩種應用在顯示器上的閘極驅動電路，第一種為雙向掃描(Bi-directional Scanning)與多節點共用(Pre-charge & Noise-free Sharing)機制的閘極驅動電路，利用四相時序訊號可實現單一路徑充放電，甚至擴充輸出級，大量節省面積，達到窄邊框的目的。 第二種為低功耗取向，配合新提出之pseudo-bootstrap unit以及單時序訊號之架構的閘極驅動電路，可以減低雜訊以及降低功耗，而其未來發展則朝向雙向掃描的方向進行。

It is popular and inevitable for us to have many instruments with display screens in our life. The requirements of qualities whatever in image or appearance of apparatus have become more sophisticated. A revolutionary technology of TFT LCDs has been developed quickly which is system-on-panel (SOP) applications. However, SOP application has the potential to realize compact, highly reliable, and high resolution display by integrating functional circuits within a display. Besides, the cost of panel becomes lower, as well as the higher yield rate can be achieved. In the driver system of thin-film transistor liquid-crystal display (TFT-LCD), gate drivers (or scan drivers) are the essential parts that sequentially control the gates of pixel TFTs. Therefore, the pixel TFTs can transfer correct data and store in the liquid crystal and storage capacitors. Recently, in the consumer electronic display products, the gate driver circuits have been integrated into the bottom plate glass of LCD module rather than providing form the conventional ICs. Although the electron mobility in a-Si TFTs is extremely low (≈0.3cm2/V-s), the traits of high uniformity and low cost of manufacturing a-Si TFTs have created the trend towards gate driver on array (GOA). Moreover, the application of GOA decreases the cost of ICs and results in the module lighter and thinner. In this thesis, we propose two kinds of gate driver for the flat panel application. First one is bi-directional, pre-charge and noise-free sharing gate driver circuit. Using four phase clock signals to achieve single path condition and expanding the output stage can save tremendous layout area for narrow bezel purpose. In the second one, we emphasize on the power consumption issue. We propose a new structure called pseudo-bootstrap unit and introduce the concept of single clock driving to our gate driver circuit. Furthermore, this gate driver can not only suppress the noise but also lower the power consumption. We are hoping to add the bi-directional scanning feature into this gate driver in the future.