標題: | 應用在貝氏循序切割大數據分析的位元平面乘載資料架構 A Bit-Plane Payload Architecture for Bayesian Sequential Partition based Big Data Analysis |
作者: | 古方如 Ku, Fang-Ju 李鎮宜 Lee, Chen-Yi 電子工程學系 電子研究所 |
關鍵字: | 大數據分析;位元平面;硬體架構;貝氏循序切割;Big data analysus;Bit-plane;Hardware architecture;Bayesian sequential partition |
公開日期: | 2013 |
摘要: | 近年來利用機器學習演算法,來實現巨量資料分析的研究成為熱門議題, 機器學習的資料導向特色可以達成快速學習以及高精確度的成效,為了實現一個適合巨量資料分析的快速學習技術,本論文提出了一以高平行度、高頻寬使用效率以及低成本為目標的硬體加速架構。基於大量資料傳輸之需求,我們設計一位元平面乘載資料架構來最大化輸入頻寬之效能,使單一處理器可以平行運算64 筆資料。模擬結果顯示,當資料量達106 筆,並包含210 個維度時,本架構可以在最高運算頻率265MHz 的環境下達到每Gb 每單位應用1.86mJ 之能量效率與每秒16.9Gb 的資料產量。 Currently, big data analysis is a heated topic around the world. A data-driven machine learning algorithm aims for fast learning and high accuracy is promising in the big data trend. In order to realize fast learning techniques suitable for big data analysis, this thesis proposed an accelerating engine which goals are achieving high parallelism and high bandwidth efficiency with low area cost. Due to the huge data transmission requirement, we designed a bit-plane payload architecture to maximum input bandwidth efficiency, which can process 64 input data in parallel in a single node. According to the implementation results, an energy efficiency of 1.86 mJ/Gb/Query with 16.9 Gb/sec throughput performance can be achieved under pattern N = 106, D=210 at the maximum operating frequency equals to 265 MHz. |
URI: | http://140.113.39.130/cdrfb3/record/nctu/#GT070150190 http://hdl.handle.net/11536/75975 |
Appears in Collections: | Thesis |