標題: | 抑制癲癇發作之電荷平衡電流刺激器設計 Design of Charge-Balanced Biphasic Stimulus Driver to Suppress Epileptic Seizure in the Low Voltage Process |
作者: | 曾建豪 Tseng, Chien-Hao 柯明道 Ker, Ming-Dou 電子工程學系 電子研究所 |
關鍵字: | 癲癇;電刺激器;功能性電刺激;epilepsy;stimulus driver;functional electrical stimulation(FES) |
公開日期: | 2014 |
摘要: | 近年,電刺激技術已常用於醫療方面,例如功能性電刺激 Functional electrical stimulation) 與治療性電刺激(Therapeutic electrical stimulation)。透過電流刺激患者的異常神經部位,可使患者恢復部分身體的機能。而隨著積體電路製程的發展,整合智慧型仿生系統於單晶片的目標已變得可行,結合微電子技術、醫學以及生物化學,可以製造應用於不同疾病醫療之生物晶片,例如癲癇晶片。 抑制癲癇的方式為輸出定電流刺激,而人體規格的抑制電流大小需要高達1-3 mA,從生醫電子安全的考量,需要減少雙向電流的電荷誤差,以避免電荷累積在電極上而造成神經細胞的傷害。此外,電極以及人體組織阻抗會隨著電極擺放位置以及深度而有所不同,考慮到負載適應性,輸出級需要用到近10V高電壓。 為了與智慧型仿生系統中的其他電路做單晶片整合,刺激器電路必須使用低壓製程來實作。此外,系統晶片只提供1.8V之供應電壓,所以晶片內部需要藉由DC-DC轉換器產生刺激器所需的高工作電壓VCC。本研究所提出之刺激器電路使用電壓限制技巧,使其能以低壓製程元件來承受高壓,而電晶體不會面臨電性過壓的情形。藉由三位元的控制訊號可輸出0.5, 1, 1.5, 2, 2.5, 3mA的輸出電流。整體電路在TSMC 0.18μm 1.8V/3.3V 低電壓製程下實現。 Nowadays, the treatment of using electrical stimulation has been investigated and verified, such as functional electrical stimulation (FES) and therapeutic electrical stimulation (TES). By stimulating abnormal nerve sites of the patients, they may restore some body functions. As the CMOS process developed, using an implantable device to provide stimulus current can be accomplished. The biomedical chip is made by the combination of microelectronics, medicine and biochemical such as epilepsy prosthetic SoC. The methodology to suppress epilepsy seizure is constant current stimulation, and the effective scale of stimulus current for human body is up to 1-3mA. For safety considerations, the stimulus driver should be designed to deliver charge-balanced biphasic current pulses and reduce the mismatch between the anodic and cathodic pulses to avoid charge accumulation and damaging the never cells. In addition, the electrode-tissue impedance varies with the position and depth of the electrodes in human body. Consider the loading adaptation, high voltage supply 10V is required in the output stage. To be integrated with other circuits into SoC, this work is implemented in low-voltage process. However, the power supply of the SoC is only 1.8V. DC-DC boost converter is required to raise the voltage potential for the stimulus driver. By using voltage limiting technique, the proposed stimulus driver, which consists of low voltage devices, is able to sustain high voltage (10V) without gate-oxide overstress. 3-bit amplitude signals are used to control the scale of stimulus current from 0.5mA to 3mA, with 0.5mA a step. The overall circuit has been fabricated by the TSMC 0.18μm 1.8V/3.3V CMOS process. |
URI: | http://140.113.39.130/cdrfb3/record/nctu/#GT070150252 http://hdl.handle.net/11536/76184 |
Appears in Collections: | Thesis |