統計方法在次100 奈米電晶體製程最佳化及敏感度分析之研究

Abstract

本文提出一個系統化之統計方法用來研究次100 奈米金屬氧化物半 導體場效應電晶體製程參數最佳化以及特性敏感度之問題。經過一系 列的篩選實驗、實驗設計、工程用製程元件模擬器、二次反應曲面模 型以及用願望函數(Desirability Function)，吾人可取得製程最佳解，使得五種重要的元件特性在製程最佳化之後皆能達到所限定的規格與範圍。這五種元件特性與規格限制分別為：一、臨界電壓望目。二、次臨界電壓斜率望小。三、漏電流望小。四、飽和電流望目。五、汲極偏壓導致通道能障降低效應望小。

針對90 奈米金屬氧化物半導體場效應電晶體之製程，吾人首先透過 篩選實驗，七個顯著的製程因子被挑選出做進一步的中央合成設計，進而成功地導出各特性的相對應二次反應曲面模型。在模型建構過程 中，所需用到的實驗設計矩陣，有別於傳統常用的中央合成設計需要 七十九個實驗，吾人同時提出其他兩種小型合成設計：一為需四十七 個實驗之較小合成設計，另一為需三十七個實驗的最小合成設計。在 不失工程準確性的要求下，此方法有效地提供了快速的模型建構與製 程最佳化之應用。接著吾人運用所建構的模型，提出最佳的製程參 數，分析了參數及元件特性的敏感度。針對準確性校正後結果再調整 之需求，吾人亦提出一個校正的步驟，讓最佳化後的結果更符合需求。

本研究所使用的方法，在時間、成本、效率的考量上，顯得很有經濟 效益；例如傳統中央合成設計需要花費316 小時的TCAD 模擬時間 來取得完整的製程與元件特性資料，吾人使用之最小合成設計只需 148 小時，比傳統中央合成設計減少一半以上的模擬時間，即可獲得 完整的資料。在實際的半導體製程與量測上，此方法亦具有相同的效 益。總之，透過嚴密的統計分析以及實驗驗證之過程，本論文不僅成 功地提供一有系統化的統計方法，來探討製程參數最佳化及特性敏感 度之問題，同時亦可達成工程上所預想的結果。

In this thesis, a fabrication optimization problem of sub-100nm NMOSFET devices is investigated by a systematically statistical method. Based on the screening design, the design of experiment, a well-known industrial used TCAD simulation tool, the response surface methodology, and the optimization using desirability function, the device performances after fabrication have been statistically optimized with respect to five specified physical constraints. They are 1) shifting the value of threshold voltage to the specific target; 2) minimizing the subthreshold slope; 3) minimizing the off-state current; 4) moving the value of on-state current to a specific target; 5) and minimizing the drain-induced barrier lowing.

In the 90nm NMOSFET fabrication, seven significant factors are selected from the screen design and then used to perform a central composite design with seventy-nine experiments. They are: 1) gate length; 2) threshold voltage implant dose; 3) threshold voltage implant energy; 4) punch-through implant dose; 5) punch-through implant energy; 6) oxide growth temperature; and 7) oxide growth time. These results of experiments are then used for building response surface models and applied for the optimization and the process sensitivity analysis. Then we perform a verification experiment to verify that the optimal conditions which are suggested by this work indeed give the projected improvement. For the requirement of the adjustment after the accuracy verification, we further provide an empirical procedure to meet this goal. Besides the traditional central composite design, two smaller composite designs; one is a smaller composite design with forty-seven experiments and the other is a smallest composite design with thirty-seven experiments are investigated in this work. These two designs are more computationally economical then the traditional design in terms of accuracy and computing-time.

In this work we use the face central cube design, a special form of the central composite design, to build the response surface models. About 316 hours computing-time is required to perform this design. Two smaller designs could be used instead of this traditional one; a smaller composite design spend about 188 hours to get all of the information, the other smallest composite design only need about 148 hours. More than 50% time is saved in this design, and we find that the device performances which are fabricated by these three optimal recipes are close to each other and also acceptable in our physical constrains. Thus we suggest that engineers could use these economical designs to analyze the fabrication optimization problems rather than the central composite design.

Finally, the purpose of this study is to provide a systematically statistical method to analysis the problems of the parameter optimization and the process sensitivity for the 90nm MOSFET. Through several sequential statistical experiments and simulation verifications, the achieved results are good in terms of several fabrication specifications and accuracy of the targets. We believe that the proposed statistical methodology will benefit the design and fabrication of nanoscale MOSFET devices.