標題: | An all-digital phase-frequency tunable clock generator for wireless OFDM communications systems |
作者: | Yu, Jui-Yuan Chen, Juinn-Ting Yang, Mei-Hui Chung, Ching-Che Lee, Chen-Yi 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
公開日期: | 2007 |
摘要: | An all-digital clock generator is designed to enable the clock phase and frequency tuning dynamically during the wireless communications system is in operation. This phase-frequency tunable clock generator (PFTCG) provides 8 clock phases for selection and enables the ADC circuits sampling signals with lower frequency and better sampling phase, resulting in lower power consumption. The PFTCG provides the frequency tuning range +/- 150ppm centered at 5MHz, resulting in high performance due to smaller sampling clock offset. This PFTCG is simulated under the wireless body area network system, and shows a 6.3dB SNR improvement at BER=1 e(-3), and the. hardware is simulated with power 77.56 mu M in the standard process 90nm CMOS technology. |
URI: | http://hdl.handle.net/11536/7813 |
ISBN: | 978-1-4244-1592-2 |
期刊: | 20TH ANNIVERSARY IEEE INTERNATIONAL SOC CONFERENCE, PROCEEDINGS |
起始頁: | 305 |
結束頁: | 308 |
顯示於類別: | 會議論文 |