標題: 高效能與外部接腳最少化之電流控制模式直流轉直流降壓電源轉換器
High Performances and Minimized External Pins in Current Mode DC-DC Buck Converters
作者: 劉德賢
Te-Hsien Liu
陳科宏
Ke-Horng Chen
電控工程研究所
關鍵字: 高效能;外部接腳;最少化;High Performances;External Pins;Minimized
公開日期: 2006
摘要: 在手持式電子產品的應用上,高效能與小型化的電壓轉換器發展是日趨重要的。 在本論文中,運用所提出的電容倍增技術來減少晶片的外部元件數 (補償網路和柔性啟動元件),藉此來有效的降低系統成本與面積。而在電容倍增技術上,同時也置入了快速反應模式來改善應統的動態響應。為了能在廣泛的負載範圍下能維持系統的效率,脈波寬度調變模式和脈波頻率調變模式被同時運用在系統中。當適當地切換這兩種模式,則系統的效率可以高達百分之八十八以上。 本論文是以台灣積體電路製造股份有限公司點三五微米互補式金氧製程來實現,而模擬結果與效能值也包含在本論文中。
For portable device applications, high performance and compact size of voltage converter develops are increasingly important. In this thesis, the proposed capacitor multiplier is used to integrate the external components (compensation network, soft-start capacitor) inside the chip. Hence, the component cost and board are reduced relatively. The fast transient machine is also included in the capacitor multiplier to improve the dynamic responses. In order to keep the efficiency within width range of loading, the pulse width modulation (PWM) mode and pulse frequency modulation (PFM) mode are included in this system. When the two modes are switched appropriately, the efficiency of system could be up to 88%. This thesis is implemented by TSMC 0.35μm CMOS process. The simulations results and the performances are also shown in this thesis.
URI: http://140.113.39.130/cdrfb3/record/nctu/#GT009312587
http://hdl.handle.net/11536/78275
顯示於類別:畢業論文