標題: | 動態精細分工異質雙核心排程器的設計與分析 Design and Analysis of a Dynamic Fine-Granularity Task Scheduler for Heterogeneous Dual-Core Platforms |
作者: | 李國丞 Kuo-Cheng Lee 蔡淳仁 Chun-Jen Tsai 資訊科學與工程研究所 |
關鍵字: | 動態精細分工;異質雙核心排程器;移植;嵌入式平台;嵌入式作業系統;Dynamic Fine-Granularity Task Scheduler;Heterogeneous Dual-Core Platforms;eCos;porting;Redboot;embedded platform;embedded OS |
公開日期: | 2005 |
摘要: | 本論文主旨在於設計和分析非對稱式多核心平台上動態精細分工排程器的效能。當系統平台上有著多顆不同類型的處理器,並且以某一處理器為控制整個系統的依據,即為非對稱式異質多核心平台。通常在這種平台上,因為處理器架構不同,所以一個程式的各個程序必須事先決定好要在那一個處理核心執行,而預先編成該核心的執行碼,而不是動態決定每一個程序要在那一個核心執行。為了增進複雜的嵌入式系統效能,過去我們曾提出一個能讓應用程式中的關鍵程序在執行時才動態決定要在那個處理核心執行的架構[1][22][24]。本論文的主要目標則是將這樣的一個作業系統核心實作出來。另外,為了能動態地把一個程序分配給不同指令集的處理核心執行,本論文也設計了一個解決方案。
整個系統的實作是以eCos為基本作業系統;在其kernel內加入一個Dispatcher,藉由該 Dispatcher監控各核心工作的負載,動態即時地分配工作。實驗所用的平台為TI的OMAP 5912 OSK發展平台。OMAP 5912 OSK處理器採用ARM (RISC核心) 和C5510 (DSP核心) 的雙核心架構.。在本論文設計的系統中, 由ARM負責執行Dispatcher,針對每一個註冊為雙核心的工作,進行動態分配,透過這兩種不同類型的處理器的密切合作, 來達到更高的效能。另外,本論文所提出的新的程式設計模式及作業系統API,也讓使用者對於應用程式只需做最少的修改,便能充分利用異質雙核心平台的能力,提高應用程式移植的便利性。 In this thesis, we have implemented a dynamic fine-granularity task scheduler for heterogeneous dual-core platforms. The target platform contains more than one heterogeneous processor cores and one of them controls the whole system. For a platform which contains heterogeneous processor architecture, application designers typically solve the task partition problem during development time. Since the applications are statically partitioned, subtasks of an application can not be dynamically scheduled across processors at run-time. In order to increase performance of complex multi-tasking embedded systems, we have proposed a dynamic runtime scheduling architecture [1][22][24]. In this thesis, a system that realizes this vision is implemented. Furthermore, we have designed a solution that solves the problem of dynamically executing a function on two processor cores of different instruction set architecture. The system is based on the eCos embedded operating system. A new dispatcher is added to the eCos kernel to monitor the runtime loading of each processor and dispatch tasks accordingly. The dual-core platform used for system implementation is the TI OMAP 5912 OSK development board with an ARM core (RISC) and a C5510 core (DSP). The ARM core is in charge of running the dispatcher and the main application threads. For each function call that is registered as a dual-core module, the dispatcher will dispaches it either to ARM or DSP on-the-fly.Through the proposed tightly-coupled cooperation approach, the propsed system can achieve higher performance, especially when multiple applications are running on the platform. We also proposed a new programming model and a system API to facilitate porting of a regular software to take advantage of the heterogeneous dual-core platform. |
URI: | http://140.113.39.130/cdrfb3/record/nctu/#GT009317534 http://hdl.handle.net/11536/78744 |
顯示於類別: | 畢業論文 |