Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | 李得瑋 | en_US |
dc.contributor.author | De-Wei Li | en_US |
dc.contributor.author | 張添烜 | en_US |
dc.contributor.author | Tian-Sheuan Chang | en_US |
dc.date.accessioned | 2014-12-12T03:02:54Z | - |
dc.date.available | 2014-12-12T03:02:54Z | - |
dc.date.issued | 2006 | en_US |
dc.identifier.uri | http://140.113.39.130/cdrfb3/record/nctu/#GT009411654 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/80566 | - |
dc.description.abstract | 近年來,隨著編碼效能的改進,H.264/AVC這個次世代的國際視訊編碼標準可以明顯地降低資料量但仍維持視訊品質,在這些技術中,空間性的框內編碼是具有高編碼效率與高視訊品質的新工具。在本篇論文中,我們提供擁有極高框內壓縮效能的編碼器以及使用相同框內壓縮方式的框內編解碼器架構。 這個壓縮流程有著非常複雜的演算法且會影響其他畫面的效果,所以必須有良好的快速模式決定演算法以及更準確的代價函數,我們同時移除了平面預測來加強模式決定速度。 在架構設計方面,雖然原來的架構已經是很優秀的基本規範的編碼器,不過它仍然不足以支援高等規範的高複雜度:我們同時面對比之前的工作增加37.5%的計算複雜度、低硬體成本、計算週期限制、硬體衝突、以及部份硬體低使用率。 為了解決這個問題,除了快速的模組實現外,由巨圖塊層次的管線化型式、特別增加的一條路徑去適合高級規範中框內預測的超高計算複雜度、平行化處理8像素的重建以及使用三種技術來修改編碼過程,以避免閒置的週期、改善資料生產量並節省可觀的硬體代價。 簡而言之,我們對於H.264/AVC內編碼的主要貢獻在於框內編解碼器晶片架構設計,我們的編碼器可以在1080p的尺吋下比之前的工作[30]平均增加0.31dB的PSNR以及減少18.35%的編碼位元。整個壓縮流程設計最後可以分別在145MHz時脈下支援高級規範並高解析度1920x1080尺寸30fps的即時視訊編碼,可在58MHz下進行視訊解碼。 | zh_TW |
dc.description.abstract | For the recent years, the evolution of video technology coding effeciency has been greatly improved. So H.264/AVC, regarded as the international video coding standard for the next generation, can achieve significant bitrate reduction but still maintains the video quality. In these techniques, the spatial intra coding is a newly proposed coding tool with high efficiency and quality. In this thesis, we contribute a hardware implementation of encoder with very high intra coding efficiency and intra frame codec with the same intra coding tool. This intra encoding has very complex algorithm and influences the quality of other frames. So superior fast mode decision and enhanced cost function are needed. Besides, we remove the plane mode speed up the computation time of mode decision. In the architecture design, alough the original one in [30] is quite superior as baseline profile encoder, it is still not enough to support the high complexity of high profile, we have many problems at the same time, such as 37.5% computing complexity more than previous work, reducing hardware cost, constraints of the computing cycles, structure hazard, and low utilization of several hardware design. To solve this problem, in addition to fast module implementation the process is arrenged by the marcoblock-level peipelineing style together, an additional computing path to fit the very high compuataion complexiy of intra prediction in high profile, 8-pixell parallel reconstruction and modified scheduling with three techniques to avoid idle cycles and improve data throughput and reduce considerable hardware cost. In brief, our main contributions to H.264/AVC coding is architechcture deisgn of intra frame encoder with high profile. our encoder has higher PSNR by 0.31dB and lower bit-rate by 18.35% in average in 1080p frame resolution than previous one [30]. This codec finally can encode high definition 1920x1080 size at 30fps real-time with high profile when clocked at 145MHz and decoding at 58 MHz respectively. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | H.264 | zh_TW |
dc.subject | 框內 | zh_TW |
dc.subject | 編碼 | zh_TW |
dc.subject | H.264 | en_US |
dc.subject | Intra | en_US |
dc.subject | encoder | en_US |
dc.title | 1080p 高級規範H.264 框內編碼設計 | zh_TW |
dc.title | Design of an 1080p high profile H.264 intra encoder | en_US |
dc.type | Thesis | en_US |
dc.contributor.department | 電子研究所 | zh_TW |
Appears in Collections: | Thesis |
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