以FPGA實現VRM多相交錯式數位控制器

Abstract

本文提出以單晶片場可規劃邏輯陣列(field programmable gateway array, FPGA)來實現電壓調節模組(voltage regulator modules, VRM)的多相交錯式數位控器，包含交錯式電流取樣以及負載電流前饋補償。在降壓轉換器中，開關切換時電感電流的取樣訊號將會與脈寬調變(pulse width modulation, PWM)訊號同步。文中提出的取樣方法能有效避免開關切換所造成的雜訊，在取樣週期中，電流將會正確地被感測。藉由數位的介面將微處理器與負載做連結，用前饋補償的方式依照時脈、負載、以及運算時間來做輸出電壓的調整。數位控制器以及脈寬調變產生器的時脈在同一個取樣頻率下延遲，而達到互相交錯的效果。整個VRM的數位控制架構將會在文中被提及，同時針對微處理器快速動態響應的部份做模擬分析以及電路實驗驗證。

This thesis presents the design and implementation of a singe-chip FPGA based digital VRM controller for multi-phase synchronous buck converters with interlaced current sampling and load current feed-forward compensation techniques. The sampling of the inductor current is synchronized with the PWM signal in synchronous buck converter for both turn-on and turn-off. The proposed sampling scheme has immunity to the switching noise. A true average current signal with minimum response time can be measured with accuracy within a switching period. The timing clocks for the digital controller and the digital PWM generator are interleaved with each other to achieve a minimum delay at a same sampling and switching frequency. A digital interface is designed for the connected microprocessor load to adjust the output voltage and provide feed-forward load current compensation according to its clock rate, loading factor, and pipeline scheduling. The realization scheme for the proposed digital VRM controller has been described. Simulation analysis and experimental verifications are given to illustrate the fast dynamic response control of VRM for advanced microprocessors.