使用延遲器之首位相連式之位元交錯調變碼

Abstract

由於使用延遲器的多層次編碼調變（multilevel coded modulation）需要使用前導位元（pilot bits，通常使用0位元）來幫助解碼，這些多餘的補0位元造成傳輸功率的浪費及淨傳輸率的損失。本論文即針對這項使用延遲器的多層次編碼調變的缺失提出一種改善的結構。我們使用首尾相連（tail-biting）的技術，使之能利用解碼碼字迴授（decoded codeword feedback）在第二次遞迴解碼時將之當成前導位元使用以改善位元錯誤率。這種首尾相連的結構可不需要前導位元，並能利用遞迴式解碼持續改善性能。另外，由於此種編碼調變方式在結構上與位元交錯式調變碼（bit interleaved coded modulation）相似，我們也將其位元錯誤率表現與位元交錯式調變碼之性能做比較。

This thesis proposes a coding scheme based on delay processor interleaved multilevel coded modulation (DPI-MCM). Conventional DPI-MCM requires the insertion of redundant pilot bits (usually “0” bits are used) whence decreases the net data throughput. Our scheme gives a better data throughput for it can do without pilot bits. We use a tail-biting-like structure so that the “tail” part of the decoded output obtained in the initial decoding iteration can be used as the pilot bits in the second iteration in a decision-feedback manner. As DPI-MCM can be regarded as a special case of bit-interleaved coded modulation (BICM), we also compare the performance with compatible interleaving depth.