永磁式同步馬達速度控制之FPGA晶片研製

Abstract

本論文以Altera所開發FPGA(場效型可規劃邏輯陣列)晶片為基礎，利用硬體描述語言VHDL系統層級模組化的設計技巧，實現永磁式同步馬達向量控制晶片製作。此控制晶片主要實現永磁式同步馬達控制中所需要執行之座標轉換、方形脈波編碼器信號(QEP)偵測與數位轉換、速度與電流迴路之比例-積分控制器、空間向量脈波寬度調變(SVPWM)等控制功能模組，為了簡化設計與降低硬體實現之複雜度，本論文採模組化設計，先將各功能以單模組實現，在組合成整體架構。在數值系統設計上使用12位元Q11格式的數值處理方式實現正規化，以解決數位邏輯晶片上浮點數運算問題，且能提高馬達控制精準度與晶片資料數值運算解析度。

實驗系統方面，除了採用FPGA晶片為永磁式同步馬達主要控制核心外，並配合一套包含驅動電路，回授訊號處理電路，來完成永磁式同步馬達速度控制系統的建構。並經由實驗數據的量測分析與控制參數調整，而獲取系統較佳的控制效能表現。

In this thesis, velocity of permanent magnet synchronous motors ( PMSM ) is realized on a chip based on FPGA ( Field Programmable Gate Array ) chip developed by Altera, utilizing VHDL ( Very High Speed Integrated Circuit ( VHSIC ) Hardware Description Language ) modulation techniques and competence from a system planning level opinion. The function needed for controlling PMSM, sush as a detection of quadrature encoder pulse ( QEP ), coordinate transformation, proportional-integration ( PI ) controller for current and velocity loop, space vector PWM ( SVPWM ). To simplify the design and increase the precision realization. To realize normalization, 16 bits Q14 numerical process is used on numerical system design, and the problem of floating point number calculation on chip can be solved. Moreover, the precision of motor control and the resolution of chip data process can both be improved.

For the experimental steup and related system collocation, it is not taken into account except for the FPGA-based chip of the core concept for controlling a PMSM, with a drive circuit, feedback signal process circuit. The better system control performance can be achieved by measuring experiment data and modulating the control parameters.