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dc.contributor.authorHuang, Zhe-Yangen_US
dc.contributor.authorHuang, Che-Chengen_US
dc.date.accessioned2014-12-08T15:11:39Z-
dc.date.available2014-12-08T15:11:39Z-
dc.date.issued2007en_US
dc.identifier.isbn978-1-4244-1131-3en_US
dc.identifier.urihttp://hdl.handle.net/11536/8946-
dc.description.abstractIn this paper a CMOS dual-wideband low-noise amplifier (LNA) is designed for ultra-wideband (UWB) wireless receiver radio system..The design consists of a wideband input impedance matching network, two stage cascode amplifiers with shunt-peaked load, a notch filter and an output buffer for measurement purpose. It is simulated in TSMC 0.18um standard RF CMOS process. The LNA gives 13.66dB maximum power gain between 3.0GHz-4.9GHz and 10.34dB maximum power gain between 6.0GHz-10.3GHz while consuming 24.07mW through a 1.8V supply. Over the 3.1GHz-4.9GHz frequency band and the 6.0GHz-10.3GHz, a minimum noise figure is 2.6dB and 3.8dB. Input return loss lower than -8.31dB in all bandwidth have been achieved.en_US
dc.language.isoen_USen_US
dc.subjectRFICen_US
dc.subjectultra-widebanden_US
dc.subjectUWBen_US
dc.subjectnotchen_US
dc.subjectfilteren_US
dc.subjectLNA and low-noise amplifieren_US
dc.titleCMOS dual-wideband low-noise amplifier with notch filter for 3.1GHz-10.6GHz ultra-wideband wireless receiveren_US
dc.typeProceedings Paperen_US
dc.identifier.journalASICON 2007: 2007 7TH INTERNATIONAL CONFERENCE ON ASIC, VOLS 1 AND 2, PROCEEDINGSen_US
dc.citation.spage415en_US
dc.citation.epage418en_US
dc.contributor.department電信工程研究所zh_TW
dc.contributor.departmentInstitute of Communications Engineeringen_US
dc.identifier.wosnumberWOS:000253449900100-
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