開發具備新型堆疊式閘極氧化層與自動對準增高式源/汲極結構之高效能低溫複晶矽薄膜電晶體(III)

完整後設資料紀錄

DC 欄位	值	語言
dc.contributor.author	張國明	en_US
dc.contributor.author	CHANG KOW-MING	en_US
dc.date.accessioned	2014-12-13T10:29:41Z	-
dc.date.available	2014-12-13T10:29:41Z	-
dc.date.issued	2006	en_US
dc.identifier.govdoc	NSC95-2221-E009-287	zh_TW
dc.identifier.uri	http://hdl.handle.net/11536/89524	-
dc.identifier.uri	https://www.grb.gov.tw/search/planDetail?id=1309559&docId=242001	en_US
dc.description.sponsorship	行政院國家科學委員會	zh_TW
dc.language.iso	zh_TW	en_US
dc.title	開發具備新型堆疊式閘極氧化層與自動對準增高式源/汲極結構之高效能低溫複晶矽薄膜電晶體(III)	zh_TW
dc.title	The Investigation and Fabrication of High Performance Poly-Si TFT with a Novel Stacked Gate Dielectric and Self-Aligned Raised Source/Drain Structure(III)	en_US
dc.type	Plan	en_US
dc.contributor.department	交通大學電子工程系	zh_TW
顯示於類別：	研究計畫