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dc.contributor.author吳介琮en_US
dc.contributor.authorWU JIEH-TSORNGen_US
dc.date.accessioned2014-12-13T10:31:57Z-
dc.date.available2014-12-13T10:31:57Z-
dc.date.issued2004en_US
dc.identifier.govdocNSC93-2215-E009-010zh_TW
dc.identifier.urihttp://hdl.handle.net/11536/91250-
dc.identifier.urihttps://www.grb.gov.tw/search/planDetail?id=1026629&docId=195161en_US
dc.description.sponsorship行政院國家科學委員會zh_TW
dc.language.isozh_TWen_US
dc.title高性能混合訊號式介面積體電路-總計畫(III)zh_TW
dc.titleHigh-Performance Mixed-Signal Interface Integrated Circuits(III)en_US
dc.typePlanen_US
dc.contributor.department交通大學電子工程系zh_TW
顯示於類別:研究計畫