Full metadata record
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | 黃俊達 | en_US |
| dc.contributor.author | Huang Juinn-Dar | en_US |
| dc.date.accessioned | 2014-12-13T10:32:01Z | - |
| dc.date.available | 2014-12-13T10:32:01Z | - |
| dc.date.issued | 2013 | en_US |
| dc.identifier.govdoc | NSC102-2220-E009-025 | zh_TW |
| dc.identifier.uri | http://hdl.handle.net/11536/91309 | - |
| dc.identifier.uri | https://www.grb.gov.tw/search/planDetail?id=2957466&docId=413065 | en_US |
| dc.description.sponsorship | 行政院國家科學委員會 | zh_TW |
| dc.language.iso | zh_TW | en_US |
| dc.title | 平行運算電子設計自動化技術研究---子計畫一：在多核心運算平台中建構應用於三維積體電路之平行設計自動化環境( III ) | zh_TW |
| dc.title | Parallel Design Automation Environment for 3D ICs Using Multi-core Computing Platform | en_US |
| dc.type | Plan | en_US |
| dc.contributor.department | 國立交通大學電子工程學系及電子研究所 | zh_TW |
| Appears in Collections: | Research Plans | |
