Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | 任建葳 | en_US |
dc.date.accessioned | 2014-12-13T10:33:30Z | - |
dc.date.available | 2014-12-13T10:33:30Z | - |
dc.date.issued | 2003 | en_US |
dc.identifier.govdoc | NSC92-2220-E009-020 | zh_TW |
dc.identifier.uri | http://hdl.handle.net/11536/92102 | - |
dc.identifier.uri | https://www.grb.gov.tw/search/planDetail?id=844309&docId=160006 | en_US |
dc.description.sponsorship | 行政院國家科學委員會 | zh_TW |
dc.language.iso | zh_TW | en_US |
dc.title | 用於軟體無線電基頻處理之系統晶片設計技術---子計畫III:數位訊號處理器與可重置加速器之設計(II) | zh_TW |
dc.title | The Design of DSP Processor Core and Configurable Accelerator (II) | en_US |
dc.type | Plan | en_US |
dc.contributor.department | 國立交通大學電子工程學系 | zh_TW |
Appears in Collections: | Research Plans |